| Message ID | 20250214155712.2849848-2-juhapekka.heikkila@gmail.com (mailing list archive) |
|---|---|
| State | New |
| Headers | show |
| Series | Add writing of WAIT_ON_DEPTH_STALL_DONE_DISABLE for gen12 | expand |
Hi JP, On Fri, Feb 14, 2025 at 05:57:11PM +0200, Juha-Pekka Heikkila wrote: > Add writing of WAIT_ON_DEPTH_STALL_DONE_DISABLE for gen12, this > is performance optimization. > > Bspec: 46132 > > Closes: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12411 > Signed-off-by: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com> Reviewed-by: Andi Shyti <andi.shyti@linux.intel.com> Thanks, Andi
Hi JP, On Fri, Feb 14, 2025 at 05:57:11PM +0200, Juha-Pekka Heikkila wrote: > Add writing of WAIT_ON_DEPTH_STALL_DONE_DISABLE for gen12, this > is performance optimization. > > Bspec: 46132 > > Closes: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12411 > Signed-off-by: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com> merged to drm-intel-gt-next. Thanks, Andi
diff --git a/drivers/gpu/drm/i915/gt/intel_gt_regs.h b/drivers/gpu/drm/i915/gt/intel_gt_regs.h index 6dba65e54cdb..a6e50af44b46 100644 --- a/drivers/gpu/drm/i915/gt/intel_gt_regs.h +++ b/drivers/gpu/drm/i915/gt/intel_gt_regs.h @@ -409,6 +409,9 @@ #define GEN7_SO_PRIM_STORAGE_NEEDED(n) _MMIO(0x5240 + (n) * 8) #define GEN7_SO_PRIM_STORAGE_NEEDED_UDW(n) _MMIO(0x5240 + (n) * 8 + 4) +#define GEN8_WM_CHICKEN2 MCR_REG(0x5584) +#define WAIT_ON_DEPTH_STALL_DONE_DISABLE REG_BIT(5) + #define GEN9_WM_CHICKEN3 _MMIO(0x5588) #define GEN9_FACTOR_IN_CLR_VAL_HIZ (1 << 9) diff --git a/drivers/gpu/drm/i915/gt/intel_workarounds.c b/drivers/gpu/drm/i915/gt/intel_workarounds.c index db04c3ee02e2..116683ebe074 100644 --- a/drivers/gpu/drm/i915/gt/intel_workarounds.c +++ b/drivers/gpu/drm/i915/gt/intel_workarounds.c @@ -742,6 +742,12 @@ static void gen12_ctx_workarounds_init(struct intel_engine_cs *engine, /* Wa_1606376872 */ wa_masked_en(wal, COMMON_SLICE_CHICKEN4, DISABLE_TDC_LOAD_BALANCING_CALC); } + + /* + * This bit must be set to enable performance optimization for fast + * clears. + */ + wa_mcr_write_or(wal, GEN8_WM_CHICKEN2, WAIT_ON_DEPTH_STALL_DONE_DISABLE); } static void dg1_ctx_workarounds_init(struct intel_engine_cs *engine,
Add writing of WAIT_ON_DEPTH_STALL_DONE_DISABLE for gen12, this is performance optimization. Bspec: 46132 Closes: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12411 Signed-off-by: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com> --- drivers/gpu/drm/i915/gt/intel_gt_regs.h | 3 +++ drivers/gpu/drm/i915/gt/intel_workarounds.c | 6 ++++++ 2 files changed, 9 insertions(+)