diff mbox series

[14/19] sem/i915: Simplify intel_cdclk_update_hw_state()

Message ID 20250218211913.27867-15-ville.syrjala@linux.intel.com (mailing list archive)
State New
Headers show
Series drm/i915: cdclk/bw/dbuf readout/sanitation cleanup | expand

Commit Message

Ville Syrjälä Feb. 18, 2025, 9:19 p.m. UTC 
From: Ville Syrjälä <ville.syrjala@linux.intel.com>

intel_crtc_calculate_min_cdclk() can't return an error
(since commit 5ac860cc5254 ("drm/i915: Fix DBUF bandwidth vs.
cdclk handling")) so there is no point in checking for one.

Also we can just call it unconditionally since it itself
checks crtc_state->hw.enabled. We are currently checking
crtc_state->hw.active in the readout path, but active==enabled
during readout, and arguably enabled is the more correct thing
to check anyway.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/display/intel_cdclk.c | 10 ++--------
 1 file changed, 2 insertions(+), 8 deletions(-)
diff mbox series

Patch

diff --git a/drivers/gpu/drm/i915/display/intel_cdclk.c b/drivers/gpu/drm/i915/display/intel_cdclk.c
index 947833a96ab7..62caee4a8b64 100644
--- a/drivers/gpu/drm/i915/display/intel_cdclk.c
+++ b/drivers/gpu/drm/i915/display/intel_cdclk.c
@@ -3352,17 +3352,11 @@  void intel_cdclk_update_hw_state(struct intel_display *display)
 		const struct intel_crtc_state *crtc_state =
 			to_intel_crtc_state(crtc->base.state);
 		enum pipe pipe = crtc->pipe;
-		int min_cdclk = 0;
 
-		if (crtc_state->hw.active) {
+		if (crtc_state->hw.active)
 			cdclk_state->active_pipes |= BIT(pipe);
 
-			min_cdclk = intel_crtc_compute_min_cdclk(crtc_state);
-			if (drm_WARN_ON(display->drm, min_cdclk < 0))
-				min_cdclk = 0;
-		}
-
-		cdclk_state->min_cdclk[pipe] = min_cdclk;
+		cdclk_state->min_cdclk[pipe] = intel_crtc_compute_min_cdclk(crtc_state);
 		cdclk_state->min_voltage_level[pipe] = crtc_state->min_voltage_level;
 	}
 }