From patchwork Tue Mar 4 08:19:37 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Ankit Nautiyal X-Patchwork-Id: 14000171 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 03577C021B8 for ; Tue, 4 Mar 2025 08:32:18 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 9A70310E53D; Tue, 4 Mar 2025 08:32:18 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="TwJQD7y9"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.12]) by gabe.freedesktop.org (Postfix) with ESMTPS id C337E10E541; Tue, 4 Mar 2025 08:32:17 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1741077138; x=1772613138; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=EplFRRENTlGMF8A0LS5XqA/T4jHSSFnCeHe9aUzueKY=; b=TwJQD7y96CHr+vf1TTlotbIPxScMFLFNAAn5wnNYuipNek33yaGJU0G7 mL8W3uIpQwBAQpIiCm/SMHAiCuuzShfebjKS9T47rLolSx2l/8EjWC+w0 HlSanbNm3dF2TyFilSlbCcjSivB5BzThGkWli21bW/PXH+pR0mM/XzXae mj0Tb6w65QJBpc8W6Knp9McoKh4cDf2aMURT3NXpwYaSk7NEaHji+V4KL QCmbdyB6fB5W9ydm74TNgPqpIbn2LXGxtQS4ld8U8fAvyxOa5Vy2OQekG tsRGhrUtIMThT2aDqqewx9V/jepKb4yrd5ta2pAHYk+ZLG7RyqD4dEdNg w==; X-CSE-ConnectionGUID: KHTAU1QoTmWpwwQEO75EBw== X-CSE-MsgGUID: aXGxLNXxSEaFIFDHPHdynQ== X-IronPort-AV: E=McAfee;i="6700,10204,11362"; a="45910180" X-IronPort-AV: E=Sophos;i="6.13,331,1732608000"; d="scan'208";a="45910180" Received: from orviesa001.jf.intel.com ([10.64.159.141]) by fmvoesa106.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 04 Mar 2025 00:32:18 -0800 X-CSE-ConnectionGUID: 3OKTB9PkTiqe0KqUbx87Ew== X-CSE-MsgGUID: mfZ43aldROiBeRG6lSJdEg== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.12,224,1728975600"; d="scan'208";a="155492216" Received: from srr4-3-linux-103-aknautiy.iind.intel.com ([10.223.34.160]) by smtpauth.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 04 Mar 2025 00:32:16 -0800 From: Ankit Nautiyal To: intel-gfx@lists.freedesktop.org Cc: intel-xe@lists.freedesktop.org, jani.nikula@linux.intel.com, ville.syrjala@linux.intel.com, mitulkumar.ajitkumar.golani@intel.com Subject: [PATCH 11/22] drm/i915/display: Disable PSR before disabling VRR Date: Tue, 4 Mar 2025 13:49:37 +0530 Message-ID: <20250304081948.3177034-12-ankit.k.nautiyal@intel.com> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20250304081948.3177034-1-ankit.k.nautiyal@intel.com> References: <20250304081948.3177034-1-ankit.k.nautiyal@intel.com> MIME-Version: 1.0 X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" As per bspec 49268: Disable PSR before disabling VRR. Signed-off-by: Ankit Nautiyal Reviewed-by: Ville Syrjälä --- drivers/gpu/drm/i915/display/intel_display.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c index c4b0ec60fded..d1f814050274 100644 --- a/drivers/gpu/drm/i915/display/intel_display.c +++ b/drivers/gpu/drm/i915/display/intel_display.c @@ -1173,6 +1173,8 @@ static void intel_pre_plane_update(struct intel_atomic_state *state, intel_atomic_get_new_crtc_state(state, crtc); enum pipe pipe = crtc->pipe; + intel_psr_pre_plane_update(state, crtc); + if (intel_crtc_vrr_disabling(state, crtc)) { intel_vrr_disable(old_crtc_state); intel_crtc_update_active_timings(old_crtc_state, false); @@ -1183,8 +1185,6 @@ static void intel_pre_plane_update(struct intel_atomic_state *state, intel_drrs_deactivate(old_crtc_state); - intel_psr_pre_plane_update(state, crtc); - if (hsw_ips_pre_update(state, crtc)) intel_crtc_wait_for_next_vblank(crtc);