diff mbox series

[v2,02/18] drm/i915: Don't clobber crtc_state->cpu_transcoder for inactive crtcs

Message ID 20250306163420.3961-3-ville.syrjala@linux.intel.com (mailing list archive)
State New
Headers show
Series drm/i915: cdclk/bw/dbuf readout/sanitation cleanup | expand

Commit Message

Ville Syrjala March 6, 2025, 4:34 p.m. UTC 
From: Ville Syrjälä <ville.syrjala@linux.intel.com>

Inactive crtcs are supposed to have their crtc_state completely
cleared. Currently we are clobbering crtc_state->cpu_transcoder
before determining whether it's actually enabled or not. Don't
do that.

I want to rework the inherited flag handling for inactive crtcs
a bit, and having a bogus cpu_transcoder in the crtc state can
then cause confusing fastset mismatches even when the crtc never
changes state during the commit.

Reviewed-by: Vinod Govindapillai <vinod.govindapillai@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/display/intel_display.c | 28 +++++++++-----------
 1 file changed, 13 insertions(+), 15 deletions(-)
diff mbox series

Patch

diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index 5c1c2cb83d51..8d94ab7de669 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -2985,26 +2985,25 @@  static bool i9xx_get_pipe_config(struct intel_crtc *crtc,
 {
 	struct intel_display *display = to_intel_display(crtc);
 	enum intel_display_power_domain power_domain;
+	enum transcoder cpu_transcoder = (enum transcoder)crtc->pipe;
 	intel_wakeref_t wakeref;
+	bool ret = false;
 	u32 tmp;
-	bool ret;
 
 	power_domain = POWER_DOMAIN_PIPE(crtc->pipe);
 	wakeref = intel_display_power_get_if_enabled(display, power_domain);
 	if (!wakeref)
 		return false;
 
-	pipe_config->output_format = INTEL_OUTPUT_FORMAT_RGB;
-	pipe_config->sink_format = pipe_config->output_format;
-	pipe_config->cpu_transcoder = (enum transcoder) crtc->pipe;
-
-	ret = false;
-
-	tmp = intel_de_read(display,
-			    TRANSCONF(display, pipe_config->cpu_transcoder));
+	tmp = intel_de_read(display, TRANSCONF(display, cpu_transcoder));
 	if (!(tmp & TRANSCONF_ENABLE))
 		goto out;
 
+	pipe_config->cpu_transcoder = cpu_transcoder;
+
+	pipe_config->output_format = INTEL_OUTPUT_FORMAT_RGB;
+	pipe_config->sink_format = pipe_config->output_format;
+
 	if (display->platform.g4x || display->platform.valleyview ||
 	    display->platform.cherryview) {
 		switch (tmp & TRANSCONF_BPC_MASK) {
@@ -3328,23 +3327,22 @@  static bool ilk_get_pipe_config(struct intel_crtc *crtc,
 {
 	struct intel_display *display = to_intel_display(crtc);
 	enum intel_display_power_domain power_domain;
+	enum transcoder cpu_transcoder = (enum transcoder)crtc->pipe;
 	intel_wakeref_t wakeref;
+	bool ret = false;
 	u32 tmp;
-	bool ret;
 
 	power_domain = POWER_DOMAIN_PIPE(crtc->pipe);
 	wakeref = intel_display_power_get_if_enabled(display, power_domain);
 	if (!wakeref)
 		return false;
 
-	pipe_config->cpu_transcoder = (enum transcoder) crtc->pipe;
-
-	ret = false;
-	tmp = intel_de_read(display,
-			    TRANSCONF(display, pipe_config->cpu_transcoder));
+	tmp = intel_de_read(display, TRANSCONF(display, cpu_transcoder));
 	if (!(tmp & TRANSCONF_ENABLE))
 		goto out;
 
+	pipe_config->cpu_transcoder = cpu_transcoder;
+
 	switch (tmp & TRANSCONF_BPC_MASK) {
 	case TRANSCONF_BPC_6:
 		pipe_config->pipe_bpp = 18;