From patchwork Fri Mar 7 10:52:31 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: "Hogander, Jouni" X-Patchwork-Id: 14006225 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 80786C282DE for ; Fri, 7 Mar 2025 10:52:58 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id F304810EB55; Fri, 7 Mar 2025 10:52:57 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="aqs1Nyqf"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.21]) by gabe.freedesktop.org (Postfix) with ESMTPS id D6EA710EB4F; Fri, 7 Mar 2025 10:52:56 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1741344776; x=1772880776; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=2BC5w8fax8/sRN3SXg7xVNiJG0r4bv3wvx/1T8E6fcU=; b=aqs1NyqfBR5OU5qd5ZJn6tL3smBmwIYG0IoFDVSCegWEfbtfnt9ENZmI hcdHKBKjJK2qW3taUsq6BRp4WyQE1nqVB0B6xDOCoXWeFbIGqmYaJOohi IJpF1k/F69ebbAjP/VQ92sQUhaPmCnS8lOxAn/PggwZqUzHqdu7DMhiX3 zDPS236Tuy7GJd7mG1qz71VUSa22DKdoqUrUyOQBr+1th0bYtIVik9R75 L9NxzSFyxyOGmzHVG9CAOjLe6HygE9HP5RgZ2jG7Y0Qab2+sGtC0OZVt2 PBud01AvCH0zdRlARDKUoeJyhhi5Zkagg31w6kwCZj7NtNBBjnRiP3oaX g==; X-CSE-ConnectionGUID: gaKgottrTyOLRISRu2SQCg== X-CSE-MsgGUID: gJGZVTG5RbmZYN284XKH9w== X-IronPort-AV: E=McAfee;i="6700,10204,11365"; a="42301651" X-IronPort-AV: E=Sophos;i="6.14,229,1736841600"; d="scan'208";a="42301651" Received: from fmviesa003.fm.intel.com ([10.60.135.143]) by orvoesa113.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 07 Mar 2025 02:52:56 -0800 X-CSE-ConnectionGUID: tqDkxyU6QyOxB/q0zYD8qw== X-CSE-MsgGUID: 3gpJW2tBT0KhkhGHZekiWA== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.12,224,1728975600"; d="scan'208";a="123481588" Received: from mlehtone-mobl.ger.corp.intel.com (HELO jhogande-mobl1..) ([10.245.245.100]) by fmviesa003-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 07 Mar 2025 02:52:55 -0800 From: =?utf-8?q?Jouni_H=C3=B6gander?= To: intel-gfx@lists.freedesktop.org, intel-xe@lists.freedesktop.org Cc: =?utf-8?q?Jouni_H=C3=B6gander?= Subject: [RFC PATCH 05/11] drm/i915/psr: Write PIPEDMC_BLOCK_PKGC_SW when enabling PSR Date: Fri, 7 Mar 2025 12:52:31 +0200 Message-ID: <20250307105237.2909849-6-jouni.hogander@intel.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250307105237.2909849-1-jouni.hogander@intel.com> References: <20250307105237.2909849-1-jouni.hogander@intel.com> MIME-Version: 1.0 Organization: Intel Finland Oy - BIC 0357606-4 - Westendinkatu 7, 02160 Espoo X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Write PIPEDMC_BLOCK_PKGC_SW when enabling PSR as described in workaround for underrun on idle PSR HW issue (Wa_16025596647). Bspec: 74151 Signed-off-by: Jouni Högander --- drivers/gpu/drm/i915/display/intel_psr.c | 15 +++++++++++++++ 1 file changed, 15 insertions(+) diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c index 1415e1e7aaf2..a3946eef44f0 100644 --- a/drivers/gpu/drm/i915/display/intel_psr.c +++ b/drivers/gpu/drm/i915/display/intel_psr.c @@ -37,6 +37,7 @@ #include "intel_de.h" #include "intel_display_irq.h" #include "intel_display_types.h" +#include "intel_dmc_regs.h" #include "intel_dp.h" #include "intel_dp_aux.h" #include "intel_frontbuffer.h" @@ -1961,6 +1962,13 @@ static void intel_psr_enable_source(struct intel_dp *intel_dp, intel_de_rmw(display, CLKGATE_DIS_MISC, 0, CLKGATE_DIS_MISC_DMASC_GATING_DIS); } + + /* Wa_16025596647 */ + if ((DISPLAY_VER(display) == 20 || + IS_DISPLAY_VERx100_STEP(display, 3000, STEP_A0, STEP_B0)) && + !intel_dp->psr.panel_replay_enabled) + intel_de_rmw(display, PIPEDMC_BLOCK_PKGC_SW(intel_dp->psr.pipe), 0, + PIPEDMC_BLOCK_PKGC_SW_BLOCK_PKGC_ALWAYS); } static bool psr_interrupt_error_check(struct intel_dp *intel_dp) @@ -2186,6 +2194,13 @@ static void intel_psr_disable_locked(struct intel_dp *intel_dp) DP_RECEIVER_ALPM_CONFIG, 0); } + /* Wa_16025596647 */ + if ((DISPLAY_VER(display) == 20 || + IS_DISPLAY_VERx100_STEP(display, 3000, STEP_A0, STEP_B0)) && + !intel_dp->psr.panel_replay_enabled) + intel_de_rmw(display, PIPEDMC_BLOCK_PKGC_SW(intel_dp->psr.pipe), + PIPEDMC_BLOCK_PKGC_SW_BLOCK_PKGC_ALWAYS, 0); + intel_dp->psr.enabled = false; intel_dp->psr.panel_replay_enabled = false; intel_dp->psr.sel_update_enabled = false;