| Message ID | 20250310121615.1077079-19-ankit.k.nautiyal@intel.com (mailing list archive) |
|---|---|
| State | New |
| Headers | show |
| Series | Use VRR timing generator for fixed refresh rate modes | expand |
On Mon, Mar 10, 2025 at 05:46:12PM +0530, Ankit Nautiyal wrote: > Since the vrr.guardband can now change for platforms that always use the > VRR Timing Generator, and it is unsafe to reprogram the guardband on the > fly, move the guardband and pipeline_full checks from the pure !fastboot > path and add a check for intel_vrr_always_use_vrr_tg(). > > For older platforms the vrr.guardband change happens when VRR Timing > generator is off. For the platforms that always use the VRR Timing > Generator, this will prevent reprogramming the vrr.guardband without a > full modeset. However, this will disrupt LRR functionality for these > platforms. > > v2: modify the check to avoid breaking the LRR on older platform. > (Ville) > > Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com> > --- > drivers/gpu/drm/i915/display/intel_display.c | 5 +++++ > drivers/gpu/drm/i915/display/intel_vrr.c | 1 - > drivers/gpu/drm/i915/display/intel_vrr.h | 2 ++ > 3 files changed, 7 insertions(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c > index 7ac504885869..53e2c11112c3 100644 > --- a/drivers/gpu/drm/i915/display/intel_display.c > +++ b/drivers/gpu/drm/i915/display/intel_display.c > @@ -5397,6 +5397,11 @@ intel_pipe_config_compare(const struct intel_crtc_state *current_config, > PIPE_CONF_CHECK_BOOL(cmrr.enable); You neglected to remove them from this block. With that sorted Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> > } > > + if (!fastset || intel_vrr_always_use_vrr_tg(display)) { > + PIPE_CONF_CHECK_I(vrr.pipeline_full); > + PIPE_CONF_CHECK_I(vrr.guardband); > + } > + > #undef PIPE_CONF_CHECK_X > #undef PIPE_CONF_CHECK_I > #undef PIPE_CONF_CHECK_LLI > diff --git a/drivers/gpu/drm/i915/display/intel_vrr.c b/drivers/gpu/drm/i915/display/intel_vrr.c > index 57e9aef02b7c..b83b1c66c242 100644 > --- a/drivers/gpu/drm/i915/display/intel_vrr.c > +++ b/drivers/gpu/drm/i915/display/intel_vrr.c > @@ -544,7 +544,6 @@ bool intel_vrr_is_push_sent(const struct intel_crtc_state *crtc_state) > return intel_de_read(display, TRANS_PUSH(display, cpu_transcoder)) & TRANS_PUSH_SEND; > } > > -static > bool intel_vrr_always_use_vrr_tg(struct intel_display *display) > { > if (!HAS_VRR(display)) > diff --git a/drivers/gpu/drm/i915/display/intel_vrr.h b/drivers/gpu/drm/i915/display/intel_vrr.h > index d857633bc02c..c92d6dd26f6d 100644 > --- a/drivers/gpu/drm/i915/display/intel_vrr.h > +++ b/drivers/gpu/drm/i915/display/intel_vrr.h > @@ -13,6 +13,7 @@ struct intel_atomic_state; > struct intel_connector; > struct intel_crtc_state; > struct intel_dsb; > +struct intel_display; > > bool intel_vrr_is_capable(struct intel_connector *connector); > bool intel_vrr_is_in_range(struct intel_connector *connector, int vrefresh); > @@ -38,5 +39,6 @@ int intel_vrr_vblank_delay(const struct intel_crtc_state *crtc_state); > void intel_vrr_transcoder_enable(const struct intel_crtc_state *crtc_state); > void intel_vrr_transcoder_disable(const struct intel_crtc_state *crtc_state); > void intel_vrr_set_fixed_rr_timings(const struct intel_crtc_state *crtc_state); > +bool intel_vrr_always_use_vrr_tg(struct intel_display *display); > > #endif /* __INTEL_VRR_H__ */ > -- > 2.45.2
diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c index 7ac504885869..53e2c11112c3 100644 --- a/drivers/gpu/drm/i915/display/intel_display.c +++ b/drivers/gpu/drm/i915/display/intel_display.c @@ -5397,6 +5397,11 @@ intel_pipe_config_compare(const struct intel_crtc_state *current_config, PIPE_CONF_CHECK_BOOL(cmrr.enable); } + if (!fastset || intel_vrr_always_use_vrr_tg(display)) { + PIPE_CONF_CHECK_I(vrr.pipeline_full); + PIPE_CONF_CHECK_I(vrr.guardband); + } + #undef PIPE_CONF_CHECK_X #undef PIPE_CONF_CHECK_I #undef PIPE_CONF_CHECK_LLI diff --git a/drivers/gpu/drm/i915/display/intel_vrr.c b/drivers/gpu/drm/i915/display/intel_vrr.c index 57e9aef02b7c..b83b1c66c242 100644 --- a/drivers/gpu/drm/i915/display/intel_vrr.c +++ b/drivers/gpu/drm/i915/display/intel_vrr.c @@ -544,7 +544,6 @@ bool intel_vrr_is_push_sent(const struct intel_crtc_state *crtc_state) return intel_de_read(display, TRANS_PUSH(display, cpu_transcoder)) & TRANS_PUSH_SEND; } -static bool intel_vrr_always_use_vrr_tg(struct intel_display *display) { if (!HAS_VRR(display)) diff --git a/drivers/gpu/drm/i915/display/intel_vrr.h b/drivers/gpu/drm/i915/display/intel_vrr.h index d857633bc02c..c92d6dd26f6d 100644 --- a/drivers/gpu/drm/i915/display/intel_vrr.h +++ b/drivers/gpu/drm/i915/display/intel_vrr.h @@ -13,6 +13,7 @@ struct intel_atomic_state; struct intel_connector; struct intel_crtc_state; struct intel_dsb; +struct intel_display; bool intel_vrr_is_capable(struct intel_connector *connector); bool intel_vrr_is_in_range(struct intel_connector *connector, int vrefresh); @@ -38,5 +39,6 @@ int intel_vrr_vblank_delay(const struct intel_crtc_state *crtc_state); void intel_vrr_transcoder_enable(const struct intel_crtc_state *crtc_state); void intel_vrr_transcoder_disable(const struct intel_crtc_state *crtc_state); void intel_vrr_set_fixed_rr_timings(const struct intel_crtc_state *crtc_state); +bool intel_vrr_always_use_vrr_tg(struct intel_display *display); #endif /* __INTEL_VRR_H__ */
Since the vrr.guardband can now change for platforms that always use the VRR Timing Generator, and it is unsafe to reprogram the guardband on the fly, move the guardband and pipeline_full checks from the pure !fastboot path and add a check for intel_vrr_always_use_vrr_tg(). For older platforms the vrr.guardband change happens when VRR Timing generator is off. For the platforms that always use the VRR Timing Generator, this will prevent reprogramming the vrr.guardband without a full modeset. However, this will disrupt LRR functionality for these platforms. v2: modify the check to avoid breaking the LRR on older platform. (Ville) Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com> --- drivers/gpu/drm/i915/display/intel_display.c | 5 +++++ drivers/gpu/drm/i915/display/intel_vrr.c | 1 - drivers/gpu/drm/i915/display/intel_vrr.h | 2 ++ 3 files changed, 7 insertions(+), 1 deletion(-)