From patchwork Mon Mar 10 12:16:13 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Ankit Nautiyal X-Patchwork-Id: 14009879 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id CAEFBC28B2E for ; Mon, 10 Mar 2025 12:28:51 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 5E10D10E447; Mon, 10 Mar 2025 12:28:51 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="SGZYt1SP"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.9]) by gabe.freedesktop.org (Postfix) with ESMTPS id 8B8DC10E446; Mon, 10 Mar 2025 12:28:50 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1741609731; x=1773145731; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=5KKzpBsZr+CKez8SJdR2PPvovGv0sz7QQzg3TPiDwn4=; b=SGZYt1SPTWwrOmUzz4mQLkw48Kq5tGrNGXD3viD5ibaGNXxar0ypgKby wCLUPtyqm764uKFD7YTgIZC/Y0e1DJzbbalXpvkRpNepefmOKM1MLlx8L AnAU0bTjY18O3IzpOaTWZGRtjeBh4EthKhIqkvAs8LyqhmTCgrf7B2rYm 8Ik8/8ViZDLdyFxlHl8/zU48ABHtmdHNeUaR2uoUOlasWyG+6NJoCnnWe HAnz4TzjoJcuXlZUMbmUtF/CmXlAxvXMB8sX2q6o0PvxM0hup8KFkDfYR 2qg59+60ZMSAmMWP2HQUHOzNiH0EO3HOj5BYrOr2oLNMHclPYA58uPEfi Q==; X-CSE-ConnectionGUID: ikQRr1HLRbSkqNRnWpQYnA== X-CSE-MsgGUID: Tha0XJYrQDu4QUkyLqhKJg== X-IronPort-AV: E=McAfee;i="6700,10204,11369"; a="65057325" X-IronPort-AV: E=Sophos;i="6.14,236,1736841600"; d="scan'208";a="65057325" Received: from fmviesa002.fm.intel.com ([10.60.135.142]) by orvoesa101.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 10 Mar 2025 05:28:50 -0700 X-CSE-ConnectionGUID: 6eE3j8f7SBqKJvgIcReuAA== X-CSE-MsgGUID: +cq2+7TASjyveEV/YAj8jA== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.14,236,1736841600"; d="scan'208";a="143180595" Received: from srr4-3-linux-103-aknautiy.iind.intel.com ([10.223.34.160]) by fmviesa002-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 10 Mar 2025 05:28:49 -0700 From: Ankit Nautiyal To: intel-gfx@lists.freedesktop.org Cc: intel-xe@lists.freedesktop.org, jani.nikula@linux.intel.com, ville.syrjala@linux.intel.com, mitulkumar.ajitkumar.golani@intel.com Subject: [PATCH 19/21] drm/i915/vrr: Allow fixed_rr with pipe joiner Date: Mon, 10 Mar 2025 17:46:13 +0530 Message-ID: <20250310121615.1077079-20-ankit.k.nautiyal@intel.com> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20250310121615.1077079-1-ankit.k.nautiyal@intel.com> References: <20250310121615.1077079-1-ankit.k.nautiyal@intel.com> MIME-Version: 1.0 X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" VRR with joiner is currently disabled as it still needs some work to correctly sequence the primary and secondary transcoders. However, we can still use VRR Timing generator in fixed refresh rate for joiner and since it just need to program vrr timings once and does not involve changing timings on the fly. We still need to skip the VRR and LRR for joiner. To achieve this set vrr.in_range to 0 for joiner case, so that we do not try VRR and LRR for the joiner case. v2: Avoid checks for secondary pipes, where not required. (Ville) Signed-off-by: Ankit Nautiyal Reviewed-by: Ville Syrjälä --- drivers/gpu/drm/i915/display/intel_vrr.c | 21 ++++++++++++++------- 1 file changed, 14 insertions(+), 7 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_vrr.c b/drivers/gpu/drm/i915/display/intel_vrr.c index b83b1c66c242..76398b3a9679 100644 --- a/drivers/gpu/drm/i915/display/intel_vrr.c +++ b/drivers/gpu/drm/i915/display/intel_vrr.c @@ -353,19 +353,23 @@ intel_vrr_compute_config(struct intel_crtc_state *crtc_state, if (!HAS_VRR(display)) return; - /* - * FIXME all joined pipes share the same transcoder. - * Need to account for that during VRR toggle/push/etc. - */ - if (crtc_state->joiner_pipes) - return; - if (adjusted_mode->flags & DRM_MODE_FLAG_INTERLACE) return; crtc_state->vrr.in_range = intel_vrr_is_in_range(connector, drm_mode_vrefresh(adjusted_mode)); + /* + * Allow fixed refresh rate with VRR Timing Generator. + * For now set the vrr.in_range to 0, to allow fixed_rr but skip actual + * VRR and LRR. + * #TODO For actual VRR with joiner, we need to figure out how to + * correctly sequence transcoder level stuff vs. pipe level stuff + * in the commit. + */ + if (crtc_state->joiner_pipes) + crtc_state->vrr.in_range = 0; + vmin = intel_vrr_compute_vmin(crtc_state); if (crtc_state->vrr.in_range) { @@ -488,6 +492,9 @@ void intel_vrr_send_push(struct intel_dsb *dsb, if (!crtc_state->vrr.enable) return; + if (intel_crtc_is_joiner_secondary(crtc_state)) + return; + if (dsb) intel_dsb_nonpost_start(dsb);