Message ID | 20250318073540.2773890-7-ankit.k.nautiyal@intel.com (mailing list archive) |
---|---|
State | New |
Headers | show |
Series | Use VRR timing generator for fixed refresh rate modes | expand |
On Tue, Mar 18, 2025 at 01:05:30PM +0530, Ankit Nautiyal wrote: > In intel_post_plane_update() there are things which might need to do > vblank waits, so enabling PSR as early as we do now is simply > counter-productive. Therefore move intel_psr_post_plane_update() at the > last of intel_post_plane_update(). > > Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com> > Suggested-by: Ville Syrjälä <ville.syrjala@linux.intel.com> > --- > drivers/gpu/drm/i915/display/intel_display.c | 4 ++-- > 1 file changed, 2 insertions(+), 2 deletions(-) > > diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c > index 246da49af00b..4a0083fdfb05 100644 > --- a/drivers/gpu/drm/i915/display/intel_display.c > +++ b/drivers/gpu/drm/i915/display/intel_display.c > @@ -1048,8 +1048,6 @@ static void intel_post_plane_update(struct intel_atomic_state *state, > intel_atomic_get_new_crtc_state(state, crtc); > enum pipe pipe = crtc->pipe; > > - intel_psr_post_plane_update(state, crtc); > - > intel_frontbuffer_flip(dev_priv, new_crtc_state->fb_bits); > > if (new_crtc_state->update_wm_post && new_crtc_state->hw.active) > @@ -1078,6 +1076,8 @@ static void intel_post_plane_update(struct intel_atomic_state *state, > > if (audio_enabling(old_crtc_state, new_crtc_state)) > intel_encoders_audio_enable(state, crtc); > + > + intel_psr_post_plane_update(state, crtc); Jouni, do you recall any specific reason for the current order? > } > > static void intel_post_plane_update_after_readout(struct intel_atomic_state *state, > -- > 2.45.2
On Fri, 2025-03-21 at 19:43 +0200, Ville Syrjälä wrote: > On Tue, Mar 18, 2025 at 01:05:30PM +0530, Ankit Nautiyal wrote: > > In intel_post_plane_update() there are things which might need to > > do > > vblank waits, so enabling PSR as early as we do now is simply > > counter-productive. Therefore move intel_psr_post_plane_update() at > > the > > last of intel_post_plane_update(). > > > > Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com> > > Suggested-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by: Jouni Högander <jouni.hogander@intel.com> > > --- > > drivers/gpu/drm/i915/display/intel_display.c | 4 ++-- > > 1 file changed, 2 insertions(+), 2 deletions(-) > > > > diff --git a/drivers/gpu/drm/i915/display/intel_display.c > > b/drivers/gpu/drm/i915/display/intel_display.c > > index 246da49af00b..4a0083fdfb05 100644 > > --- a/drivers/gpu/drm/i915/display/intel_display.c > > +++ b/drivers/gpu/drm/i915/display/intel_display.c > > @@ -1048,8 +1048,6 @@ static void intel_post_plane_update(struct > > intel_atomic_state *state, > > intel_atomic_get_new_crtc_state(state, crtc); > > enum pipe pipe = crtc->pipe; > > > > - intel_psr_post_plane_update(state, crtc); > > - > > intel_frontbuffer_flip(dev_priv, new_crtc_state->fb_bits); > > > > if (new_crtc_state->update_wm_post && new_crtc_state- > > >hw.active) > > @@ -1078,6 +1076,8 @@ static void intel_post_plane_update(struct > > intel_atomic_state *state, > > > > if (audio_enabling(old_crtc_state, new_crtc_state)) > > intel_encoders_audio_enable(state, crtc); > > + > > + intel_psr_post_plane_update(state, crtc); > > Jouni, do you recall any specific reason for the current order? I can't recall any specific reason. Also went through the sequence. I think this change should be fine. BR, Jouni Högander > > > } > > > > static void intel_post_plane_update_after_readout(struct > > intel_atomic_state *state, > > -- > > 2.45.2 >
diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c index 246da49af00b..4a0083fdfb05 100644 --- a/drivers/gpu/drm/i915/display/intel_display.c +++ b/drivers/gpu/drm/i915/display/intel_display.c @@ -1048,8 +1048,6 @@ static void intel_post_plane_update(struct intel_atomic_state *state, intel_atomic_get_new_crtc_state(state, crtc); enum pipe pipe = crtc->pipe; - intel_psr_post_plane_update(state, crtc); - intel_frontbuffer_flip(dev_priv, new_crtc_state->fb_bits); if (new_crtc_state->update_wm_post && new_crtc_state->hw.active) @@ -1078,6 +1076,8 @@ static void intel_post_plane_update(struct intel_atomic_state *state, if (audio_enabling(old_crtc_state, new_crtc_state)) intel_encoders_audio_enable(state, crtc); + + intel_psr_post_plane_update(state, crtc); } static void intel_post_plane_update_after_readout(struct intel_atomic_state *state,
In intel_post_plane_update() there are things which might need to do vblank waits, so enabling PSR as early as we do now is simply counter-productive. Therefore move intel_psr_post_plane_update() at the last of intel_post_plane_update(). Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com> Suggested-by: Ville Syrjälä <ville.syrjala@linux.intel.com> --- drivers/gpu/drm/i915/display/intel_display.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-)