From patchwork Wed Apr 9 14:02:51 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Animesh Manna X-Patchwork-Id: 14044750 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 4CB5AC36002 for ; Wed, 9 Apr 2025 14:25:56 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id DA1F910E8F5; Wed, 9 Apr 2025 14:25:55 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="a+2uwXAB"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.15]) by gabe.freedesktop.org (Postfix) with ESMTPS id 670F710E8F4; Wed, 9 Apr 2025 14:25:54 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1744208754; x=1775744754; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=VkBYUnXMpdH2aYZgPOg7g9Sjrh1bQG9FZJv0eHyhzBY=; b=a+2uwXAB9bcqVLql/ZSUSYdvCLDCL4GKPfaNY5nJG10uLSL2hm3bNwSu +nXtNZRdVAj9Bpj0gKmid1e5k3rlbeC2PVWUGRqfTF5izPN14+T6RQSI1 bK/6Dn5fvtJVsgjeJPhn06QQgmkxm4t97NoFdYma1nX7Hfl7sY253RIrC sEHMofvgGW3xuPiVPw5YmG5i1trnYaDqGMRPBKMbNu+UEyYVkBpgSJapm 3GMzFYrseSI8mu047R2koYxlUURa1zhD9j0U8+jOaReyj4oiIhoD/CXRJ MrubemFY9HyFrTL+w52lAAXgXiJYMMJlXId6XlviMvExaFSZ0SV0pDmaR g==; X-CSE-ConnectionGUID: mV8bwM3rSvyb5LCllEgqgw== X-CSE-MsgGUID: ++deZZLRS/u1xquDviYqAQ== X-IronPort-AV: E=McAfee;i="6700,10204,11397"; a="49347766" X-IronPort-AV: E=Sophos;i="6.15,200,1739865600"; d="scan'208";a="49347766" Received: from fmviesa003.fm.intel.com ([10.60.135.143]) by orvoesa107.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 09 Apr 2025 07:25:54 -0700 X-CSE-ConnectionGUID: haQdoMf1RpaDX+JF8L+leQ== X-CSE-MsgGUID: pzMjmnzkRi+x/D8gBbX9GA== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.15,200,1739865600"; d="scan'208";a="132732593" Received: from srr4-3-linux-101-amanna.iind.intel.com ([10.223.74.76]) by fmviesa003.fm.intel.com with ESMTP; 09 Apr 2025 07:25:52 -0700 From: Animesh Manna To: intel-gfx@lists.freedesktop.org, intel-xe@lists.freedesktop.org Cc: jouni.hogander@intel.com, jani.nikula@intel.com, jeevan.b@intel.com, Animesh Manna Subject: [PATCH v8 2/9] drm/i915/lobf: Add lobf enablement in post plane update Date: Wed, 9 Apr 2025 19:32:51 +0530 Message-Id: <20250409140258.785834-3-animesh.manna@intel.com> X-Mailer: git-send-email 2.29.0 In-Reply-To: <20250409140258.785834-1-animesh.manna@intel.com> References: <20250409140258.785834-1-animesh.manna@intel.com> MIME-Version: 1.0 X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Enablement of LOBF is added in post plane update whenever has_lobf flag is set. As LOBF can be enabled in non-psr case as well so adding in post plane update. There is no change of configuring alpm with psr path. v1: Initial version. v2: Use encoder-mask to find the associated encoder from crtc-state. [Jani] v3: Remove alpm_configure from intel_psr.c. [Jouni] Signed-off-by: Animesh Manna Reviewed-by: Jouni Högander --- drivers/gpu/drm/i915/display/intel_alpm.c | 25 ++++++++++++++++++++ drivers/gpu/drm/i915/display/intel_alpm.h | 4 ++++ drivers/gpu/drm/i915/display/intel_display.c | 3 +++ drivers/gpu/drm/i915/display/intel_psr.c | 3 --- 4 files changed, 32 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_alpm.c b/drivers/gpu/drm/i915/display/intel_alpm.c index 1dbaa8f250aa..41f8b05cc11c 100644 --- a/drivers/gpu/drm/i915/display/intel_alpm.c +++ b/drivers/gpu/drm/i915/display/intel_alpm.c @@ -367,6 +367,31 @@ void intel_alpm_configure(struct intel_dp *intel_dp, lnl_alpm_configure(intel_dp, crtc_state); } +void intel_alpm_post_plane_update(struct intel_atomic_state *state, + struct intel_crtc *crtc) +{ + struct intel_display *display = to_intel_display(state); + const struct intel_crtc_state *crtc_state = + intel_atomic_get_new_crtc_state(state, crtc); + struct intel_encoder *encoder; + + if (!crtc_state->has_lobf && !crtc_state->has_psr) + return; + + for_each_intel_encoder_mask(display->drm, encoder, + crtc_state->uapi.encoder_mask) { + struct intel_dp *intel_dp; + + if (!intel_encoder_is_dp(encoder)) + continue; + + intel_dp = enc_to_intel_dp(encoder); + + if (intel_dp_is_edp(intel_dp)) + intel_alpm_configure(intel_dp, crtc_state); + } +} + static int i915_edp_lobf_info_show(struct seq_file *m, void *data) { struct intel_connector *connector = m->private; diff --git a/drivers/gpu/drm/i915/display/intel_alpm.h b/drivers/gpu/drm/i915/display/intel_alpm.h index 8c409b10dce6..2f862b0476a8 100644 --- a/drivers/gpu/drm/i915/display/intel_alpm.h +++ b/drivers/gpu/drm/i915/display/intel_alpm.h @@ -12,6 +12,8 @@ struct intel_dp; struct intel_crtc_state; struct drm_connector_state; struct intel_connector; +struct intel_atomic_state; +struct intel_crtc; void intel_alpm_init_dpcd(struct intel_dp *intel_dp); bool intel_alpm_compute_params(struct intel_dp *intel_dp, @@ -21,6 +23,8 @@ void intel_alpm_lobf_compute_config(struct intel_dp *intel_dp, struct drm_connector_state *conn_state); void intel_alpm_configure(struct intel_dp *intel_dp, const struct intel_crtc_state *crtc_state); +void intel_alpm_post_plane_update(struct intel_atomic_state *state, + struct intel_crtc *crtc); void intel_alpm_lobf_debugfs_add(struct intel_connector *connector); bool intel_alpm_aux_wake_supported(struct intel_dp *intel_dp); bool intel_alpm_aux_less_wake_supported(struct intel_dp *intel_dp); diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c index 16fd7c00ba01..2bd193bef5cd 100644 --- a/drivers/gpu/drm/i915/display/intel_display.c +++ b/drivers/gpu/drm/i915/display/intel_display.c @@ -55,6 +55,7 @@ #include "i9xx_plane.h" #include "i9xx_plane_regs.h" #include "i9xx_wm.h" +#include "intel_alpm.h" #include "intel_atomic.h" #include "intel_atomic_plane.h" #include "intel_audio.h" @@ -1080,6 +1081,8 @@ static void intel_post_plane_update(struct intel_atomic_state *state, if (audio_enabling(old_crtc_state, new_crtc_state)) intel_encoders_audio_enable(state, crtc); + intel_alpm_post_plane_update(state, crtc); + intel_psr_post_plane_update(state, crtc); } diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c index eef48c014112..7ad4a01e0378 100644 --- a/drivers/gpu/drm/i915/display/intel_psr.c +++ b/drivers/gpu/drm/i915/display/intel_psr.c @@ -1893,9 +1893,6 @@ static void intel_psr_enable_source(struct intel_dp *intel_dp, intel_dp->psr.psr2_sel_fetch_enabled ? IGNORE_PSR2_HW_TRACKING : 0); - if (intel_dp_is_edp(intel_dp)) - intel_alpm_configure(intel_dp, crtc_state); - /* * Wa_16013835468 * Wa_14015648006