| Message ID | 20250414024256.2782702-3-ankit.k.nautiyal@intel.com (mailing list archive) |
|---|---|
| State | New |
| Headers | show |
| Series | Macro for 3 DSC engines per pipe | expand |
> -----Original Message----- > From: Nautiyal, Ankit K <ankit.k.nautiyal@intel.com> > Sent: Monday, April 14, 2025 8:13 AM > To: intel-gfx@lists.freedesktop.org; intel-xe@lists.freedesktop.org > Cc: Kandpal, Suraj <suraj.kandpal@intel.com>; stable@vger.kernel.org; > Nautiyal, Ankit K <ankit.k.nautiyal@intel.com> > Subject: [PATCH 2/2] drm/i915/dp: Check for HAS_DSC_3ENGINES while > configuring DSC slices > > DSC 12 slices configuration is used for some specific cases with Ultrajoiner. This > can be supported only when each of the 4 joined pipes have 3 DSC engines > each. > > Add the missing check for 3 DSC engines support before using 3 DSC slices per > pipe. > > Fixes: be7f5fcdf4a0 ("drm/i915/dp: Enable 3 DSC engines for 12 slices") > Cc: Ankit Nautiyal <ankit.k.nautiyal@intel.com> > Cc: Suraj Kandpal <suraj.kandpal@intel.com> > Cc: <stable@vger.kernel.org> # v6.14+ > Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com> LGTM, Reviewed-by: Suraj Kandpal <suraj.kandpal@intel.com> > --- > drivers/gpu/drm/i915/display/intel_dp.c | 7 ++++--- > 1 file changed, 4 insertions(+), 3 deletions(-) > > diff --git a/drivers/gpu/drm/i915/display/intel_dp.c > b/drivers/gpu/drm/i915/display/intel_dp.c > index aeb14a5455fd..d7a30d0992b7 100644 > --- a/drivers/gpu/drm/i915/display/intel_dp.c > +++ b/drivers/gpu/drm/i915/display/intel_dp.c > @@ -1050,10 +1050,11 @@ u8 intel_dp_dsc_get_slice_count(const struct > intel_connector *connector, > u8 test_slice_count = valid_dsc_slicecount[i] * > num_joined_pipes; > > /* > - * 3 DSC Slices per pipe need 3 DSC engines, > - * which is supported only with Ultrajoiner. > + * 3 DSC Slices per pipe need 3 DSC engines, which is supported > only > + * with Ultrajoiner only for some platforms. > */ > - if (valid_dsc_slicecount[i] == 3 && num_joined_pipes != 4) > + if (valid_dsc_slicecount[i] == 3 && > + (!HAS_DSC_3ENGINES(display) || num_joined_pipes != 4)) > continue; > > if (test_slice_count > > -- > 2.34.1
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c index aeb14a5455fd..d7a30d0992b7 100644 --- a/drivers/gpu/drm/i915/display/intel_dp.c +++ b/drivers/gpu/drm/i915/display/intel_dp.c @@ -1050,10 +1050,11 @@ u8 intel_dp_dsc_get_slice_count(const struct intel_connector *connector, u8 test_slice_count = valid_dsc_slicecount[i] * num_joined_pipes; /* - * 3 DSC Slices per pipe need 3 DSC engines, - * which is supported only with Ultrajoiner. + * 3 DSC Slices per pipe need 3 DSC engines, which is supported only + * with Ultrajoiner only for some platforms. */ - if (valid_dsc_slicecount[i] == 3 && num_joined_pipes != 4) + if (valid_dsc_slicecount[i] == 3 && + (!HAS_DSC_3ENGINES(display) || num_joined_pipes != 4)) continue; if (test_slice_count >
DSC 12 slices configuration is used for some specific cases with Ultrajoiner. This can be supported only when each of the 4 joined pipes have 3 DSC engines each. Add the missing check for 3 DSC engines support before using 3 DSC slices per pipe. Fixes: be7f5fcdf4a0 ("drm/i915/dp: Enable 3 DSC engines for 12 slices") Cc: Ankit Nautiyal <ankit.k.nautiyal@intel.com> Cc: Suraj Kandpal <suraj.kandpal@intel.com> Cc: <stable@vger.kernel.org> # v6.14+ Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com> --- drivers/gpu/drm/i915/display/intel_dp.c | 7 ++++--- 1 file changed, 4 insertions(+), 3 deletions(-)