Message ID | 20250417114454.12836-5-ville.syrjala@linux.intel.com (mailing list archive) |
---|---|
State | New |
Headers | show |
Series | drm/i915/vga: Clean up VGA plane handling | expand |
On Thu, 17 Apr 2025, Ville Syrjala <ville.syrjala@linux.intel.com> wrote: > From: Ville Syrjälä <ville.syrjala@linux.intel.com> > > Add some debugs to the VGA plane disable so that we can at least > see from the logs when it happens (and on which pipe). I was curious > about this at some point when I was seeing some random underruns > near the time when we disable the VGA plane, but I think in the end > that turned out to be a red herring. > > Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by: Jani Nikula <jani.nikula@intel.com> > --- > drivers/gpu/drm/i915/display/intel_vga.c | 29 +++++++++++++++++++++++- > 1 file changed, 28 insertions(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/i915/display/intel_vga.c b/drivers/gpu/drm/i915/display/intel_vga.c > index 56047f701798..7ee689a9da92 100644 > --- a/drivers/gpu/drm/i915/display/intel_vga.c > +++ b/drivers/gpu/drm/i915/display/intel_vga.c > @@ -12,6 +12,7 @@ > #include "i915_drv.h" > #include "i915_reg.h" > #include "intel_de.h" > +#include "intel_display.h" > #include "intel_vga.h" > #include "intel_vga_regs.h" > > @@ -25,16 +26,42 @@ static i915_reg_t intel_vga_cntrl_reg(struct intel_display *display) > return VGACNTRL; > } > > +static bool has_vga_pipe_sel(struct intel_display *display) > +{ > + if (display->platform.i845g || > + display->platform.i865g) > + return false; > + > + if (display->platform.valleyview || > + display->platform.cherryview) > + return true; > + > + return DISPLAY_VER(display) < 7; > +} > + > /* Disable the VGA plane that we never use */ > void intel_vga_disable(struct intel_display *display) > { > struct pci_dev *pdev = to_pci_dev(display->drm->dev); > i915_reg_t vga_reg = intel_vga_cntrl_reg(display); > + enum pipe pipe; > + u32 tmp; > u8 sr1; > > - if (intel_de_read(display, vga_reg) & VGA_DISP_DISABLE) > + tmp = intel_de_read(display, vga_reg); > + if (tmp & VGA_DISP_DISABLE) > return; > > + if (display->platform.cherryview) > + pipe = REG_FIELD_GET(VGA_PIPE_SEL_MASK_CHV, tmp); > + else if (has_vga_pipe_sel(display)) > + pipe = REG_FIELD_GET(VGA_PIPE_SEL_MASK, tmp); > + else > + pipe = PIPE_A; > + > + drm_dbg_kms(display->drm, "Disabling VGA plane on pipe %c\n", > + pipe_name(pipe)); > + > /* WaEnableVGAAccessThroughIOPort:ctg,elk,ilk,snb,ivb,vlv,hsw */ > vga_get_uninterruptible(pdev, VGA_RSRC_LEGACY_IO); > outb(0x01, VGA_SEQ_I);
diff --git a/drivers/gpu/drm/i915/display/intel_vga.c b/drivers/gpu/drm/i915/display/intel_vga.c index 56047f701798..7ee689a9da92 100644 --- a/drivers/gpu/drm/i915/display/intel_vga.c +++ b/drivers/gpu/drm/i915/display/intel_vga.c @@ -12,6 +12,7 @@ #include "i915_drv.h" #include "i915_reg.h" #include "intel_de.h" +#include "intel_display.h" #include "intel_vga.h" #include "intel_vga_regs.h" @@ -25,16 +26,42 @@ static i915_reg_t intel_vga_cntrl_reg(struct intel_display *display) return VGACNTRL; } +static bool has_vga_pipe_sel(struct intel_display *display) +{ + if (display->platform.i845g || + display->platform.i865g) + return false; + + if (display->platform.valleyview || + display->platform.cherryview) + return true; + + return DISPLAY_VER(display) < 7; +} + /* Disable the VGA plane that we never use */ void intel_vga_disable(struct intel_display *display) { struct pci_dev *pdev = to_pci_dev(display->drm->dev); i915_reg_t vga_reg = intel_vga_cntrl_reg(display); + enum pipe pipe; + u32 tmp; u8 sr1; - if (intel_de_read(display, vga_reg) & VGA_DISP_DISABLE) + tmp = intel_de_read(display, vga_reg); + if (tmp & VGA_DISP_DISABLE) return; + if (display->platform.cherryview) + pipe = REG_FIELD_GET(VGA_PIPE_SEL_MASK_CHV, tmp); + else if (has_vga_pipe_sel(display)) + pipe = REG_FIELD_GET(VGA_PIPE_SEL_MASK, tmp); + else + pipe = PIPE_A; + + drm_dbg_kms(display->drm, "Disabling VGA plane on pipe %c\n", + pipe_name(pipe)); + /* WaEnableVGAAccessThroughIOPort:ctg,elk,ilk,snb,ivb,vlv,hsw */ vga_get_uninterruptible(pdev, VGA_RSRC_LEGACY_IO); outb(0x01, VGA_SEQ_I);