From patchwork Wed Jun 8 07:50:31 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Jani Nikula X-Patchwork-Id: 12872975 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id BACA4C43334 for ; Wed, 8 Jun 2022 07:50:59 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id B309E10EE17; Wed, 8 Jun 2022 07:50:55 +0000 (UTC) Received: from mga11.intel.com (mga11.intel.com [192.55.52.93]) by gabe.freedesktop.org (Postfix) with ESMTPS id 4418E10EE17; Wed, 8 Jun 2022 07:50:55 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1654674655; x=1686210655; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=1F+9R11+rJklqKC15plDbpWNvD6R2NndH62cf8tKsCw=; b=QbpsNXAvUxR4kDS5mbkcKeVI80S/9NxyIwO6CLwR1GiQR4dnX8eqgZc1 EqAkBf2tj7hcnM8Pi95nzGAXfzFodNE7MdVyWOeGMkgMAW66DVy7E+N0t WPy+PwZW2YV/xO38/yQxktpAUDTnm4jTay4K3nF6CSKny3y/NmVVjWtvE NRvZ3RQzoAUujH2BULIEYfmd4A9t0663FosWDr1qIKiexPZYJDft1gqgj bVRwPtBgyOjUwEbBAgir9HUTV/sNmhAdNcYrsTqj1f3l+lty6/CvaqhKI TtoAWVCB3g7cen79O7hr6L6XkwJtLoKNFbde9jm4kG8ZhPu20eIQ9WVP7 g==; X-IronPort-AV: E=McAfee;i="6400,9594,10371"; a="274336234" X-IronPort-AV: E=Sophos;i="5.91,285,1647327600"; d="scan'208";a="274336234" Received: from fmsmga007.fm.intel.com ([10.253.24.52]) by fmsmga102.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 08 Jun 2022 00:50:54 -0700 X-IronPort-AV: E=Sophos;i="5.91,285,1647327600"; d="scan'208";a="584719785" Received: from jkosticx-mobl.amr.corp.intel.com (HELO localhost) ([10.252.58.130]) by fmsmga007-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 08 Jun 2022 00:50:53 -0700 From: Jani Nikula To: dri-devel@lists.freedesktop.org Date: Wed, 8 Jun 2022 10:50:31 +0300 Message-Id: <2a4c94417f024cbafc5d4ca0a74e4617fc4325d1.1654674560.git.jani.nikula@intel.com> X-Mailer: git-send-email 2.30.2 In-Reply-To: References: MIME-Version: 1.0 Organization: Intel Finland Oy - BIC 0357606-4 - Westendinkatu 7, 02160 Espoo Subject: [Intel-gfx] [PATCH v2 01/15] drm/edid: fix CTA data block collection size for CTA version 3 X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: jani.nikula@intel.com, intel-gfx@lists.freedesktop.org Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" The CTA Data Block Collection is valid only for CTA extension version 3. In versions 1 and 2, it is a reserved block, which we ignore. The DTD start offset (byte 2, or d in CTA-861 spec), which determines the CTA Data Block Collection size, is specified slightly differently for different versions: Version 1: d = offset for the byte following the reserved data block. If no data is provided in the reserved data block, then d=4. If no DTDs are provided, then d=0 Version 2: d = offset for the byte following the reserved data block. If no data is provided in the reserved data block, then d=4. If d=0, then no detailed timing descriptors are provided, and no data is provided in the reserved data block. Version 3: d = offset for the byte following the data block collection. If no data is provided in the data block collection, then d=4. If d=0, then no detailed timing descriptors are provided, and no data is provided in the data block collection. Ever since commit 9e50b9d55e9c ("drm: edid: Add some bounds checking"), we've interpreted 0 to mean there are no DTDs but it's all Data Blocks. Per the spec, Data Blocks are only valid for version 3, where we should interpret 0 to mean there are no data blocks. Follow the spec (and hope the EDIDs follow it too). Cc: Ville Syrjälä Signed-off-by: Jani Nikula Reviewed-by: Ville Syrjälä --- drivers/gpu/drm/drm_edid.c | 2 -- 1 file changed, 2 deletions(-) diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c index 929fc0e46751..c57f6333ea7d 100644 --- a/drivers/gpu/drm/drm_edid.c +++ b/drivers/gpu/drm/drm_edid.c @@ -4498,8 +4498,6 @@ static const void *__cea_db_iter_edid_next(struct cea_db_iter *iter) iter->index = 4; iter->end = ext[2]; - if (iter->end == 0) - iter->end = 127; if (iter->end < 4 || iter->end > 127) continue;