From patchwork Wed Apr 7 06:28:39 2010 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Zou, Nanhai" X-Patchwork-Id: 90932 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by demeter.kernel.org (8.14.3/8.14.3) with ESMTP id o376UP2v000495 for ; Wed, 7 Apr 2010 06:31:05 GMT Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 74ED09F63A; Tue, 6 Apr 2010 23:30:06 -0700 (PDT) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga01.intel.com (mga01.intel.com [192.55.52.88]) by gabe.freedesktop.org (Postfix) with ESMTP id A6A919F616 for ; Tue, 6 Apr 2010 23:30:01 -0700 (PDT) Received: from fmsmga002.fm.intel.com ([10.253.24.26]) by fmsmga101.fm.intel.com with ESMTP; 06 Apr 2010 23:29:34 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="4.51,377,1267430400"; d="scan'208";a="555665306" Received: from pgsmsx601.gar.corp.intel.com ([10.221.43.69]) by fmsmga002.fm.intel.com with ESMTP; 06 Apr 2010 23:29:53 -0700 Received: from shzsmsx502.ccr.corp.intel.com (10.239.4.97) by pgsmsx601.gar.corp.intel.com (10.221.43.69) with Microsoft SMTP Server (TLS) id 8.2.176.0; Wed, 7 Apr 2010 14:28:45 +0800 Received: from shzsmsx502.ccr.corp.intel.com ([10.239.4.97]) by shzsmsx502.ccr.corp.intel.com ([10.239.4.97]) with mapi; Wed, 7 Apr 2010 14:28:39 +0800 From: "Zou, Nanhai" To: "intel-gfx@lists.freedesktop.org" Date: Wed, 7 Apr 2010 14:28:39 +0800 Thread-Topic: [Patch 5/5] multiple ring buffer support, fix a irq enable logic for BSD Thread-Index: AcrWG49Q+dK3PKMGRx6yzf6/ArGWHA== Message-ID: <32606542045FF34BA04F9D5BB0CB6BB5A53A282E@shzsmsx502.ccr.corp.intel.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: yes X-MS-TNEF-Correlator: acceptlanguage: en-US MIME-Version: 1.0 Cc: "Anholt, Eric" Subject: [Intel-gfx] [Patch 5/5] multiple ring buffer support, fix a irq enable logic for BSD X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.11 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: intel-gfx-bounces@lists.freedesktop.org Errors-To: intel-gfx-bounces@lists.freedesktop.org X-Greylist: IP, sender and recipient auto-whitelisted, not delayed by milter-greylist-4.2.3 (demeter.kernel.org [140.211.167.41]); Wed, 07 Apr 2010 06:31:05 +0000 (UTC) diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c index 22c8f66..0da9716 100644 --- a/drivers/gpu/drm/i915/i915_irq.c +++ b/drivers/gpu/drm/i915/i915_irq.c @@ -67,6 +67,11 @@ void ironlake_enable_graphics_irq(drm_i915_private_t *dev_priv, u32 mask) { if ((dev_priv->gt_irq_mask_reg & mask) != 0) { + I915_WRITE(GTIIR, mask); + (void) I915_READ(GTIIR); + dev_priv->gt_irq_enable_reg |= mask; + I915_WRITE(GTIER, dev_priv->gt_irq_enable_reg); + (void) I915_READ(GTIER); dev_priv->gt_irq_mask_reg &= ~mask; I915_WRITE(GTIMR, dev_priv->gt_irq_mask_reg); (void) I915_READ(GTIMR); @@ -77,9 +82,15 @@ void ironlake_disable_graphics_irq(drm_i915_private_t *dev_priv, u32 mask) { if ((dev_priv->gt_irq_mask_reg & mask) != mask) { + dev_priv->gt_irq_enable_reg &= ~mask; + I915_WRITE(GTIER, dev_priv->gt_irq_enable_reg); + (void) I915_READ(GTIER); dev_priv->gt_irq_mask_reg |= mask; I915_WRITE(GTIMR, dev_priv->gt_irq_mask_reg); (void) I915_READ(GTIMR); + I915_WRITE(GTIIR, mask); + (void) I915_READ(GTIIR); + } } @@ -1283,7 +1294,7 @@ static int ironlake_irq_postinstall(struct drm_device *dev) /* enable kind of interrupts always enabled */ u32 display_mask = DE_MASTER_IRQ_CONTROL | DE_GSE | DE_PCH_EVENT | DE_PLANEA_FLIP_DONE | DE_PLANEB_FLIP_DONE; - u32 render_mask = GT_USER_INTERRUPT | GT_BSD_USER_INTERRUPT; + u32 render_mask = 0; /* enable nothing initially */ u32 hotplug_mask = SDE_CRT_HOTPLUG | SDE_PORTB_HOTPLUG | SDE_PORTC_HOTPLUG | SDE_PORTD_HOTPLUG;