From patchwork Wed Jun 15 15:27:38 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Mauro Carvalho Chehab X-Patchwork-Id: 12882555 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 5FABCC43334 for ; Wed, 15 Jun 2022 15:28:02 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 32FA5112215; Wed, 15 Jun 2022 15:27:49 +0000 (UTC) Received: from dfw.source.kernel.org (dfw.source.kernel.org [IPv6:2604:1380:4641:c500::1]) by gabe.freedesktop.org (Postfix) with ESMTPS id A925D1121DD; Wed, 15 Jun 2022 15:27:47 +0000 (UTC) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id 347EB61728; Wed, 15 Jun 2022 15:27:47 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 075C2C341C4; Wed, 15 Jun 2022 15:27:45 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1655306866; bh=ArrWWi9aGs9TPTpy73ldENPFG9RCYJiCftXoVPyfiXA=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=g+Z9a8tBUvrdOq9En5CSui7C1egHykyAomklROUSNevyZlUzrxdBtW+8Jg/Sbs3dx B/frSxNCMCV1HpkQb3FUy9yPEHvE/C4Fgcscb6nwZk2wud73DWJQmGG+ZnZeaMqoqj S4tTuphrd2FjPf2ytW5WMFAYIzf4OoLS6qhqVzgqnTBXWADmBbQnxh9XrDdAC5v4o8 DKszVAokucAtHdAzZu2vvm0TGcdwwfuXbJEyhSwPMcZQ73CL7YMWu1oShtibuLPhCx +43Tz0HKhqsADIEkozMT7BH7OSAxi6O3sxqaB4RdVWT2S1xvBhG2DqLK/O3jJNGX25 2jkOkUinAk7vQ== Received: from mchehab by mail.kernel.org with local (Exim 4.95) (envelope-from ) id 1o1Uvm-00A4Jm-FD; Wed, 15 Jun 2022 16:27:42 +0100 From: Mauro Carvalho Chehab To: Date: Wed, 15 Jun 2022 16:27:38 +0100 Message-Id: <387b9a8d3e719ad2db4fce56c0bfc0f909fd6df6.1655306128.git.mchehab@kernel.org> X-Mailer: git-send-email 2.36.1 In-Reply-To: References: MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH 4/6] drm/i915/gt: Only invalidate TLBs exposed to user manipulation X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: mauro.chehab@linux.intel.com, =?utf-8?q?Thomas_Hellstr=C3=B6m?= , David Airlie , dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org, Chris Wilson , Thomas Hellstrom , Rodrigo Vivi , Dave Airlie , stable@vger.kernel.org, Mauro Carvalho Chehab , intel-gfx@lists.freedesktop.org Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" From: Chris Wilson Don't flush TLBs when the buffer is only used in the GGTT under full control of the kernel, as there's no risk of of concurrent access and stale access from prefetch. We only need to invalidate the TLB if they are accessible by the user. Fixes: 7938d61591d3 ("drm/i915: Flush TLBs before releasing backing store") Signed-off-by: Chris Wilson Cc: Fei Yang Cc: Andi Shyti Cc: stable@vger.kernel.org Acked-by: Thomas Hellström Signed-off-by: Mauro Carvalho Chehab Reviewed-by: Andi Shyti --- See [PATCH 0/6] at: https://lore.kernel.org/all/cover.1655306128.git.mchehab@kernel.org/ drivers/gpu/drm/i915/i915_vma.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/i915_vma.c b/drivers/gpu/drm/i915/i915_vma.c index 0bffb70b3c5f..7989986161e8 100644 --- a/drivers/gpu/drm/i915/i915_vma.c +++ b/drivers/gpu/drm/i915/i915_vma.c @@ -537,7 +537,8 @@ int i915_vma_bind(struct i915_vma *vma, bind_flags); } - set_bit(I915_BO_WAS_BOUND_BIT, &vma->obj->flags); + if (bind_flags & I915_VMA_LOCAL_BIND) + set_bit(I915_BO_WAS_BOUND_BIT, &vma->obj->flags); atomic_or(bind_flags, &vma->flags); return 0;