From patchwork Mon Oct 19 15:09:23 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Maarten Lankhorst X-Patchwork-Id: 7437901 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 345BEBF90C for ; Mon, 19 Oct 2015 15:09:31 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 55ACA20778 for ; Mon, 19 Oct 2015 15:09:29 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by mail.kernel.org (Postfix) with ESMTP id 3B5532075F for ; Mon, 19 Oct 2015 15:09:28 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 90C3C6E9A9; Mon, 19 Oct 2015 08:09:27 -0700 (PDT) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) by gabe.freedesktop.org (Postfix) with ESMTP id 1A0AB6E9A9 for ; Mon, 19 Oct 2015 08:09:26 -0700 (PDT) Received: from orsmga002.jf.intel.com ([10.7.209.21]) by orsmga101.jf.intel.com with ESMTP; 19 Oct 2015 08:09:25 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.17,702,1437462000"; d="scan'208";a="830066402" Received: from apelline-mobl1.ger.corp.intel.com (HELO patser.lan) ([10.252.7.34]) by orsmga002.jf.intel.com with ESMTP; 19 Oct 2015 08:09:25 -0700 To: Ander Conselvan De Oliveira , intel-gfx@lists.freedesktop.org References: <1443007632-5573-1-git-send-email-maarten.lankhorst@linux.intel.com> <1443007632-5573-4-git-send-email-maarten.lankhorst@linux.intel.com> <1445260613.3042.62.camel@gmail.com> From: Maarten Lankhorst Message-ID: <562507A3.3080901@linux.intel.com> Date: Mon, 19 Oct 2015 17:09:23 +0200 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:38.0) Gecko/20100101 Thunderbird/38.1.0 MIME-Version: 1.0 In-Reply-To: <1445260613.3042.62.camel@gmail.com> Subject: [Intel-gfx] [PATCH 2.9/5] drm/i915: Do not wait for flips in intel_crtc_disable_noatomic. X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Op 19-10-15 om 15:16 schreef Ander Conselvan De Oliveira: > On Wed, 2015-09-23 at 13:27 +0200, Maarten Lankhorst wrote: >> Move it from intel_crtc_atomic_commit to prepare_plane_fb. >> Waiting is done before committing, otherwise it's too late >> to undo the changes. >> >> Signed-off-by: Maarten Lankhorst >> --- >> drivers/gpu/drm/i915/intel_atomic.c | 2 - >> drivers/gpu/drm/i915/intel_display.c | 107 ++++++++++++++++++++-------------- >> - >> drivers/gpu/drm/i915/intel_drv.h | 2 - >> 3 files changed, 62 insertions(+), 49 deletions(-) >> >> diff --git a/drivers/gpu/drm/i915/intel_atomic.c >> b/drivers/gpu/drm/i915/intel_atomic.c >> index f1975f267710..25a891aa3824 100644 >> --- a/drivers/gpu/drm/i915/intel_atomic.c >> +++ b/drivers/gpu/drm/i915/intel_atomic.c >> @@ -205,8 +205,6 @@ int intel_atomic_setup_scalers(struct drm_device *dev, >> * but since this plane is unchanged just do >> the >> * minimum required validation. >> */ >> - if (plane->type == DRM_PLANE_TYPE_PRIMARY) >> - intel_crtc->atomic.wait_for_flips = >> true; >> crtc_state->base.planes_changed = true; >> } >> >> diff --git a/drivers/gpu/drm/i915/intel_display.c >> b/drivers/gpu/drm/i915/intel_display.c >> index 25e1eac260fd..cd651ff6c15b 100644 >> --- a/drivers/gpu/drm/i915/intel_display.c >> +++ b/drivers/gpu/drm/i915/intel_display.c >> @@ -3221,32 +3221,6 @@ void intel_finish_reset(struct drm_device *dev) >> drm_modeset_unlock_all(dev); >> } >> >> -static void >> -intel_finish_fb(struct drm_framebuffer *old_fb) >> -{ >> - struct drm_i915_gem_object *obj = intel_fb_obj(old_fb); >> - struct drm_i915_private *dev_priv = to_i915(obj->base.dev); >> - bool was_interruptible = dev_priv->mm.interruptible; >> - int ret; >> - >> - /* Big Hammer, we also need to ensure that any pending >> - * MI_WAIT_FOR_EVENT inside a user batch buffer on the >> - * current scanout is retired before unpinning the old >> - * framebuffer. Note that we rely on userspace rendering >> - * into the buffer attached to the pipe they are waiting >> - * on. If not, userspace generates a GPU hang with IPEHR >> - * point to the MI_WAIT_FOR_EVENT. >> - * >> - * This should only fail upon a hung GPU, in which case we >> - * can safely continue. >> - */ >> - dev_priv->mm.interruptible = false; >> - ret = i915_gem_object_wait_rendering(obj, true); >> - dev_priv->mm.interruptible = was_interruptible; >> - >> - WARN_ON(ret); >> -} >> - >> static bool intel_crtc_has_pending_flip(struct drm_crtc *crtc) >> { >> struct drm_device *dev = crtc->dev; >> @@ -3867,15 +3841,23 @@ static void page_flip_completed(struct intel_crtc >> *intel_crtc) >> work->pending_flip_obj); >> } >> >> -void intel_crtc_wait_for_pending_flips(struct drm_crtc *crtc) >> +static int intel_crtc_wait_for_pending_flips(struct drm_crtc *crtc) >> { >> struct drm_device *dev = crtc->dev; >> struct drm_i915_private *dev_priv = dev->dev_private; >> + long ret; >> >> WARN_ON(waitqueue_active(&dev_priv->pending_flip_queue)); >> - if (WARN_ON(wait_event_timeout(dev_priv->pending_flip_queue, >> - !intel_crtc_has_pending_flip(crtc), >> - 60*HZ) == 0)) { >> + >> + ret = wait_event_interruptible_timeout( >> + dev_priv->pending_flip_queue, >> + !intel_crtc_has_pending_flip(crtc), >> + 60*HZ); >> + >> + if (ret < 0) >> + return ret; >> + >> + if (ret == 0) { >> struct intel_crtc *intel_crtc = to_intel_crtc(crtc); >> >> spin_lock_irq(&dev->event_lock); >> @@ -3886,11 +3868,7 @@ void intel_crtc_wait_for_pending_flips(struct drm_crtc >> *crtc) >> spin_unlock_irq(&dev->event_lock); >> } >> >> - if (crtc->primary->fb) { >> - mutex_lock(&dev->struct_mutex); >> - intel_finish_fb(crtc->primary->fb); >> - mutex_unlock(&dev->struct_mutex); >> - } > There is another caller of intel_crtc_wait_for_pending_flips() besides the one > touched in this patch: intel_crtc_disable_noatomic(). In your previous series > you dropped that call based on the fact that there shouldn't be any pending > flips at that point, but that patch has been dropped. > > Wouldn't it be better to add a WARN_ON as Chris suggested then instead of > keeping the wait for flips but without the work around? > Apply with --scissors ---8<------ intel_crtc_disable_noatomic is called from hw readout during init, resume and possibly reset. During init it's too early to have a page flip queued, before suspending all page flips should be finished and during hw reset all page flips should be removed. It's a bug when there are pending flips here, complain with WARN_ON instead of handling it. Signed-off-by: Maarten Lankhorst Reviewed-by: Ander Conselvan de Oliveira Reviewed-by: Daniel Vetter diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index f59029c3e577..95c59b5202c5 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -6225,7 +6225,8 @@ static void intel_crtc_disable_noatomic(struct drm_crtc *crtc) return; if (to_intel_plane_state(crtc->primary->state)->visible) { - intel_crtc_wait_for_pending_flips(crtc); + WARN_ON(intel_crtc->unpin_work); + intel_pre_disable_primary(crtc); }