| Message ID | 5666d9107be4b2b29306e0d67573a50e4d064daa.1412339886.git.jani.nikula@intel.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
On Fri, Oct 03, 2014 at 03:44:01PM +0300, Jani Nikula wrote: > Signed-off-by: Jani Nikula <jani.nikula@intel.com> > --- > drivers/gpu/drm/i915/intel_audio.c | 21 +++++++++++++++++++++ > 1 file changed, 21 insertions(+) > > diff --git a/drivers/gpu/drm/i915/intel_audio.c b/drivers/gpu/drm/i915/intel_audio.c > index 58de48ff3585..6d1f8438dc4d 100644 > --- a/drivers/gpu/drm/i915/intel_audio.c > +++ b/drivers/gpu/drm/i915/intel_audio.c > @@ -28,6 +28,27 @@ > #include "intel_drv.h" > #include "i915_drv.h" > > +/** > + * DOC: High Definition Audio over HDMI and Display Port > + * > + * The graphics and audio drivers together support High Definition Audio over > + * HDMI and Display Port. The audio programming sequences are divided into audio > + * codec and controller enable and disable sequences. The graphics driver > + * handles the audio codec sequences, while the audio driver handles the audio > + * controller sequences. > + * > + * The disable sequences must be performed before disabling the transcoder or > + * port. The enable sequences may only be performed after enabling the > + * transcoder and port, and after completed link training. > + * > + * The codec and controller sequences could be done either parallel or serial, > + * but generally the ELDV/PD change in the codec sequence indicates to the audio > + * driver that the controller sequence should start. Indeed, most of the > + * co-operation between the graphics and audio drivers is handled via audio > + * related registers. (The notable exception is the power management, not > + * covered here.) > + */ Generally when documenting a new file I also document all the non-static functions exported to the driver. But I guess this can wait until the functional/interface changes are merged. Also, this should get pulled into the drm/i915 docbook in a new chapter in the modeset section. Otherwise I like the series, at least from a very high-level read-through. Please sign someone up for review. -Daniel > + > static const struct { > int clock; > u32 config; > -- > 1.9.1 > > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@lists.freedesktop.org > http://lists.freedesktop.org/mailman/listinfo/intel-gfx
diff --git a/drivers/gpu/drm/i915/intel_audio.c b/drivers/gpu/drm/i915/intel_audio.c index 58de48ff3585..6d1f8438dc4d 100644 --- a/drivers/gpu/drm/i915/intel_audio.c +++ b/drivers/gpu/drm/i915/intel_audio.c @@ -28,6 +28,27 @@ #include "intel_drv.h" #include "i915_drv.h" +/** + * DOC: High Definition Audio over HDMI and Display Port + * + * The graphics and audio drivers together support High Definition Audio over + * HDMI and Display Port. The audio programming sequences are divided into audio + * codec and controller enable and disable sequences. The graphics driver + * handles the audio codec sequences, while the audio driver handles the audio + * controller sequences. + * + * The disable sequences must be performed before disabling the transcoder or + * port. The enable sequences may only be performed after enabling the + * transcoder and port, and after completed link training. + * + * The codec and controller sequences could be done either parallel or serial, + * but generally the ELDV/PD change in the codec sequence indicates to the audio + * driver that the controller sequence should start. Indeed, most of the + * co-operation between the graphics and audio drivers is handled via audio + * related registers. (The notable exception is the power management, not + * covered here.) + */ + static const struct { int clock; u32 config;
Signed-off-by: Jani Nikula <jani.nikula@intel.com> --- drivers/gpu/drm/i915/intel_audio.c | 21 +++++++++++++++++++++ 1 file changed, 21 insertions(+)