diff mbox

[v4.1,6/8] drm/i915: Nuke fbc members from intel_crtc->atomic, v3.

Message ID 56D4164F.4080205@linux.intel.com (mailing list archive)
State New, archived
Headers show

Commit Message

Maarten Lankhorst Feb. 29, 2016, 9:58 a.m. UTC
Whenever there's an update to the primary plane,
fbc_pre_update and fbc_post_update are called. Kill off
intel_crtc->atomic.update_fbc and now that intel_crtc->atomic
is empty, kill it off too.

Changes since v1:
- Add a intel_fbc_supports_rotation helper.
Changes sinec v2:
- Remove intel_fbc_supports_rotation_helper.
- Remove unrelated changes.

Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
---
This version doesn't change intel_fbc_enable any more!

Comments

Zanoni, Paulo R Feb. 29, 2016, 9:06 p.m. UTC | #1
Em Seg, 2016-02-29 às 10:58 +0100, Maarten Lankhorst escreveu:
> Whenever there's an update to the primary plane,

> fbc_pre_update and fbc_post_update are called. Kill off

> intel_crtc->atomic.update_fbc and now that intel_crtc->atomic

> is empty, kill it off too.

> 

> Changes since v1:

> - Add a intel_fbc_supports_rotation helper.

> Changes sinec v2:

> - Remove intel_fbc_supports_rotation_helper.

> - Remove unrelated changes.

> 

> Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>

> ---

> This version doesn't change intel_fbc_enable any more!


Ok, so I decided to test this.

First of all, patch 05 needs a rebase too. I did my own local rebase
and I suppose I got things right.

Second, after I did actual testing, I discovered that, contrary to my
previous belief, "old_pri_state" will also be valid when we're only
changing the sprite or cursor planes. So if we apply this patch, we'll
be calling pre_update+enable+post_update for every plane/cursor
enable/disable operation, which is not what we want since these are
unnecessary calls, as FBC only deals with the primary plane. I think we
need to fix this.

The tests I've been using to check this were:
- kms_frontbuffer_tracking/fbc-1p-primscrn-cur-indfb-onoff
- kms_frontbuffer_tracking/fbc-1p-primscrn-spr-indfb-onoff


> 

> diff --git a/drivers/gpu/drm/i915/intel_display.c

> b/drivers/gpu/drm/i915/intel_display.c

> index 78f72bef25aa..c8404092aee9 100644

> --- a/drivers/gpu/drm/i915/intel_display.c

> +++ b/drivers/gpu/drm/i915/intel_display.c

> @@ -4789,11 +4789,9 @@ static void intel_post_plane_update(struct

> intel_crtc_state *old_crtc_state)

>  {

>  	struct intel_crtc *crtc = to_intel_crtc(old_crtc_state-

> >base.crtc);

>  	struct drm_atomic_state *old_state = old_crtc_state-

> >base.state;

> -	struct intel_crtc_atomic_commit *atomic = &crtc->atomic;

>  	struct intel_crtc_state *pipe_config =

>  		to_intel_crtc_state(crtc->base.state);

>  	struct drm_device *dev = crtc->base.dev;

> -	struct drm_i915_private *dev_priv = dev->dev_private;

>  	struct drm_plane *primary = crtc->base.primary;

>  	struct drm_plane_state *old_pri_state =

>  		drm_atomic_get_existing_plane_state(old_state,

> primary);

> @@ -4805,22 +4803,19 @@ static void intel_post_plane_update(struct

> intel_crtc_state *old_crtc_state)

>  	if (pipe_config->wm_changed && pipe_config->base.active)

>  		intel_update_watermarks(&crtc->base);

>  

> -	if (atomic->update_fbc)

> -		intel_fbc_post_update(crtc);

> -

>  	if (old_pri_state) {

>  		struct intel_plane_state *primary_state =

>  			to_intel_plane_state(primary->state);

>  		struct intel_plane_state *old_primary_state =

>  			to_intel_plane_state(old_pri_state);

>  

> +		intel_fbc_post_update(crtc);

> +

>  		if (primary_state->visible &&

>  		    (needs_modeset(&pipe_config->base) ||

>  		     !old_primary_state->visible))

>  			intel_post_enable_primary(&crtc->base);

>  	}

> -

> -	memset(atomic, 0, sizeof(*atomic));

>  }

>  

>  static void intel_pre_plane_update(struct intel_crtc_state

> *old_crtc_state)

> @@ -4828,7 +4823,6 @@ static void intel_pre_plane_update(struct

> intel_crtc_state *old_crtc_state)

>  	struct intel_crtc *crtc = to_intel_crtc(old_crtc_state-

> >base.crtc);

>  	struct drm_device *dev = crtc->base.dev;

>  	struct drm_i915_private *dev_priv = dev->dev_private;

> -	struct intel_crtc_atomic_commit *atomic = &crtc->atomic;

>  	struct intel_crtc_state *pipe_config =

>  		to_intel_crtc_state(crtc->base.state);

>  	struct drm_atomic_state *old_state = old_crtc_state-

> >base.state;

> @@ -4837,15 +4831,14 @@ static void intel_pre_plane_update(struct

> intel_crtc_state *old_crtc_state)

>  		drm_atomic_get_existing_plane_state(old_state,

> primary);

>  	bool modeset = needs_modeset(&pipe_config->base);

>  

> -	if (atomic->update_fbc)

> -		intel_fbc_pre_update(crtc);

> -

>  	if (old_pri_state) {

>  		struct intel_plane_state *primary_state =

>  			to_intel_plane_state(primary->state);

>  		struct intel_plane_state *old_primary_state =

>  			to_intel_plane_state(old_pri_state);

>  

> +		intel_fbc_pre_update(crtc);

> +

>  		if (old_primary_state->visible &&

>  		    (modeset || !primary_state->visible))

>  			intel_pre_disable_primary(&crtc->base);

> @@ -11877,27 +11870,17 @@ int intel_plane_atomic_calc_changes(struct

> drm_crtc_state *crtc_state,

>  	if (visible || was_visible)

>  		pipe_config->fb_bits |= to_intel_plane(plane)-

> >frontbuffer_bit;

>  

> -	switch (plane->type) {

> -	case DRM_PLANE_TYPE_PRIMARY:

> -		intel_crtc->atomic.update_fbc = true;

> -

> -		break;

> -	case DRM_PLANE_TYPE_CURSOR:

> -		break;

> -	case DRM_PLANE_TYPE_OVERLAY:

> -		/*

> -		 * WaCxSRDisabledForSpriteScaling:ivb

> -		 *

> -		 * cstate->update_wm was already set above, so this

> flag will

> -		 * take effect when we commit and program

> watermarks.

> -		 */

> -		if (IS_IVYBRIDGE(dev) &&

> -		    needs_scaling(to_intel_plane_state(plane_state))

> &&

> -		    !needs_scaling(old_plane_state))

> -			pipe_config->disable_lp_wm = true;

> +	/*

> +	 * WaCxSRDisabledForSpriteScaling:ivb

> +	 *

> +	 * cstate->update_wm was already set above, so this flag

> will

> +	 * take effect when we commit and program watermarks.

> +	 */

> +	if (plane->type == DRM_PLANE_TYPE_OVERLAY &&

> IS_IVYBRIDGE(dev) &&

> +	    needs_scaling(to_intel_plane_state(plane_state)) &&

> +	    !needs_scaling(old_plane_state))

> +		pipe_config->disable_lp_wm = true;

>  

> -		break;

> -	}

>  	return 0;

>  }

>  

> @@ -13296,9 +13279,6 @@ static int intel_atomic_check(struct

> drm_device *dev,

>  		struct intel_crtc_state *pipe_config =

>  			to_intel_crtc_state(crtc_state);

>  

> -		memset(&to_intel_crtc(crtc)->atomic, 0,

> -		       sizeof(struct intel_crtc_atomic_commit));

> -

>  		/* Catch I915_MODE_FLAG_INHERITED */

>  		if (crtc_state->mode.private_flags != crtc->state-

> >mode.private_flags)

>  			crtc_state->mode_changed = true;

> @@ -13606,7 +13586,8 @@ static int intel_atomic_commit(struct

> drm_device *dev,

>  		if (!modeset)

>  			intel_pre_plane_update(to_intel_crtc_state(c

> rtc_state));

>  

> -		if (crtc->state->active && intel_crtc-

> >atomic.update_fbc)

> +		if (crtc->state->active &&

> +		    drm_atomic_get_existing_plane_state(state, crtc-

> >primary))

>  			intel_fbc_enable(intel_crtc);

>  

>  		if (crtc->state->active &&

> diff --git a/drivers/gpu/drm/i915/intel_drv.h

> b/drivers/gpu/drm/i915/intel_drv.h

> index 058bb10e53ae..5e5b64fff30d 100644

> --- a/drivers/gpu/drm/i915/intel_drv.h

> +++ b/drivers/gpu/drm/i915/intel_drv.h

> @@ -538,19 +538,6 @@ struct intel_mmio_flip {

>  	unsigned int rotation;

>  };

>  

> -/*

> - * Tracking of operations that need to be performed at the

> beginning/end of an

> - * atomic commit, outside the atomic section where interrupts are

> disabled.

> - * These are generally operations that grab mutexes or might

> otherwise sleep

> - * and thus can't be run with interrupts disabled.

> - */

> -struct intel_crtc_atomic_commit {

> -	/* Sleepable operations to perform before commit */

> -

> -	/* Sleepable operations to perform after commit */

> -	bool update_fbc;

> -};

> -

>  struct intel_crtc {

>  	struct drm_crtc base;

>  	enum pipe pipe;

> @@ -610,8 +597,6 @@ struct intel_crtc {

>  		int scanline_start;

>  	} debug;

>  

> -	struct intel_crtc_atomic_commit atomic;

> -

>  	/* scalers available on this crtc */

>  	int num_scalers;

>  

> 

> _______________________________________________

> Intel-gfx mailing list

> Intel-gfx@lists.freedesktop.org

> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Maarten Lankhorst March 1, 2016, 8:27 a.m. UTC | #2
Op 29-02-16 om 22:06 schreef Zanoni, Paulo R:
> Em Seg, 2016-02-29 às 10:58 +0100, Maarten Lankhorst escreveu:
>> Whenever there's an update to the primary plane,
>> fbc_pre_update and fbc_post_update are called. Kill off
>> intel_crtc->atomic.update_fbc and now that intel_crtc->atomic
>> is empty, kill it off too.
>>
>> Changes since v1:
>> - Add a intel_fbc_supports_rotation helper.
>> Changes sinec v2:
>> - Remove intel_fbc_supports_rotation_helper.
>> - Remove unrelated changes.
>>
>> Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
>> ---
>> This version doesn't change intel_fbc_enable any more!
> Ok, so I decided to test this.
>
> First of all, patch 05 needs a rebase too. I did my own local rebase
> and I suppose I got things right.
>
> Second, after I did actual testing, I discovered that, contrary to my
> previous belief, "old_pri_state" will also be valid when we're only
> changing the sprite or cursor planes. So if we apply this patch, we'll
> be calling pre_update+enable+post_update for every plane/cursor
> enable/disable operation, which is not what we want since these are
> unnecessary calls, as FBC only deals with the primary plane. I think we
> need to fix this.
This is a bug addressed by the next patch.

drm/i915: Do not compute watermarks on a noop.

I'll send the improved version for that. I didn't do it yet because I was waiting for the ILK wm patch to land.

~Maarten
diff mbox

Patch

diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 78f72bef25aa..c8404092aee9 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -4789,11 +4789,9 @@  static void intel_post_plane_update(struct intel_crtc_state *old_crtc_state)
 {
 	struct intel_crtc *crtc = to_intel_crtc(old_crtc_state->base.crtc);
 	struct drm_atomic_state *old_state = old_crtc_state->base.state;
-	struct intel_crtc_atomic_commit *atomic = &crtc->atomic;
 	struct intel_crtc_state *pipe_config =
 		to_intel_crtc_state(crtc->base.state);
 	struct drm_device *dev = crtc->base.dev;
-	struct drm_i915_private *dev_priv = dev->dev_private;
 	struct drm_plane *primary = crtc->base.primary;
 	struct drm_plane_state *old_pri_state =
 		drm_atomic_get_existing_plane_state(old_state, primary);
@@ -4805,22 +4803,19 @@  static void intel_post_plane_update(struct intel_crtc_state *old_crtc_state)
 	if (pipe_config->wm_changed && pipe_config->base.active)
 		intel_update_watermarks(&crtc->base);
 
-	if (atomic->update_fbc)
-		intel_fbc_post_update(crtc);
-
 	if (old_pri_state) {
 		struct intel_plane_state *primary_state =
 			to_intel_plane_state(primary->state);
 		struct intel_plane_state *old_primary_state =
 			to_intel_plane_state(old_pri_state);
 
+		intel_fbc_post_update(crtc);
+
 		if (primary_state->visible &&
 		    (needs_modeset(&pipe_config->base) ||
 		     !old_primary_state->visible))
 			intel_post_enable_primary(&crtc->base);
 	}
-
-	memset(atomic, 0, sizeof(*atomic));
 }
 
 static void intel_pre_plane_update(struct intel_crtc_state *old_crtc_state)
@@ -4828,7 +4823,6 @@  static void intel_pre_plane_update(struct intel_crtc_state *old_crtc_state)
 	struct intel_crtc *crtc = to_intel_crtc(old_crtc_state->base.crtc);
 	struct drm_device *dev = crtc->base.dev;
 	struct drm_i915_private *dev_priv = dev->dev_private;
-	struct intel_crtc_atomic_commit *atomic = &crtc->atomic;
 	struct intel_crtc_state *pipe_config =
 		to_intel_crtc_state(crtc->base.state);
 	struct drm_atomic_state *old_state = old_crtc_state->base.state;
@@ -4837,15 +4831,14 @@  static void intel_pre_plane_update(struct intel_crtc_state *old_crtc_state)
 		drm_atomic_get_existing_plane_state(old_state, primary);
 	bool modeset = needs_modeset(&pipe_config->base);
 
-	if (atomic->update_fbc)
-		intel_fbc_pre_update(crtc);
-
 	if (old_pri_state) {
 		struct intel_plane_state *primary_state =
 			to_intel_plane_state(primary->state);
 		struct intel_plane_state *old_primary_state =
 			to_intel_plane_state(old_pri_state);
 
+		intel_fbc_pre_update(crtc);
+
 		if (old_primary_state->visible &&
 		    (modeset || !primary_state->visible))
 			intel_pre_disable_primary(&crtc->base);
@@ -11877,27 +11870,17 @@  int intel_plane_atomic_calc_changes(struct drm_crtc_state *crtc_state,
 	if (visible || was_visible)
 		pipe_config->fb_bits |= to_intel_plane(plane)->frontbuffer_bit;
 
-	switch (plane->type) {
-	case DRM_PLANE_TYPE_PRIMARY:
-		intel_crtc->atomic.update_fbc = true;
-
-		break;
-	case DRM_PLANE_TYPE_CURSOR:
-		break;
-	case DRM_PLANE_TYPE_OVERLAY:
-		/*
-		 * WaCxSRDisabledForSpriteScaling:ivb
-		 *
-		 * cstate->update_wm was already set above, so this flag will
-		 * take effect when we commit and program watermarks.
-		 */
-		if (IS_IVYBRIDGE(dev) &&
-		    needs_scaling(to_intel_plane_state(plane_state)) &&
-		    !needs_scaling(old_plane_state))
-			pipe_config->disable_lp_wm = true;
+	/*
+	 * WaCxSRDisabledForSpriteScaling:ivb
+	 *
+	 * cstate->update_wm was already set above, so this flag will
+	 * take effect when we commit and program watermarks.
+	 */
+	if (plane->type == DRM_PLANE_TYPE_OVERLAY && IS_IVYBRIDGE(dev) &&
+	    needs_scaling(to_intel_plane_state(plane_state)) &&
+	    !needs_scaling(old_plane_state))
+		pipe_config->disable_lp_wm = true;
 
-		break;
-	}
 	return 0;
 }
 
@@ -13296,9 +13279,6 @@  static int intel_atomic_check(struct drm_device *dev,
 		struct intel_crtc_state *pipe_config =
 			to_intel_crtc_state(crtc_state);
 
-		memset(&to_intel_crtc(crtc)->atomic, 0,
-		       sizeof(struct intel_crtc_atomic_commit));
-
 		/* Catch I915_MODE_FLAG_INHERITED */
 		if (crtc_state->mode.private_flags != crtc->state->mode.private_flags)
 			crtc_state->mode_changed = true;
@@ -13606,7 +13586,8 @@  static int intel_atomic_commit(struct drm_device *dev,
 		if (!modeset)
 			intel_pre_plane_update(to_intel_crtc_state(crtc_state));
 
-		if (crtc->state->active && intel_crtc->atomic.update_fbc)
+		if (crtc->state->active &&
+		    drm_atomic_get_existing_plane_state(state, crtc->primary))
 			intel_fbc_enable(intel_crtc);
 
 		if (crtc->state->active &&
diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
index 058bb10e53ae..5e5b64fff30d 100644
--- a/drivers/gpu/drm/i915/intel_drv.h
+++ b/drivers/gpu/drm/i915/intel_drv.h
@@ -538,19 +538,6 @@  struct intel_mmio_flip {
 	unsigned int rotation;
 };
 
-/*
- * Tracking of operations that need to be performed at the beginning/end of an
- * atomic commit, outside the atomic section where interrupts are disabled.
- * These are generally operations that grab mutexes or might otherwise sleep
- * and thus can't be run with interrupts disabled.
- */
-struct intel_crtc_atomic_commit {
-	/* Sleepable operations to perform before commit */
-
-	/* Sleepable operations to perform after commit */
-	bool update_fbc;
-};
-
 struct intel_crtc {
 	struct drm_crtc base;
 	enum pipe pipe;
@@ -610,8 +597,6 @@  struct intel_crtc {
 		int scanline_start;
 	} debug;
 
-	struct intel_crtc_atomic_commit atomic;
-
 	/* scalers available on this crtc */
 	int num_scalers;