From patchwork Tue Dec 5 07:57:53 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: kevin.rogovin@intel.com X-Patchwork-Id: 10092407 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id D097560327 for ; Tue, 5 Dec 2017 07:58:00 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id C04B121F61 for ; Tue, 5 Dec 2017 07:58:00 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id B269926E74; Tue, 5 Dec 2017 07:58:00 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.2 required=2.0 tests=BAYES_00, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 2253721F61 for ; Tue, 5 Dec 2017 07:57:59 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 20EF26E406; Tue, 5 Dec 2017 07:57:59 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) by gabe.freedesktop.org (Postfix) with ESMTPS id 06F4F6E406 for ; Tue, 5 Dec 2017 07:57:57 +0000 (UTC) Received: from fmsmga001.fm.intel.com ([10.253.24.23]) by orsmga101.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 04 Dec 2017 23:57:57 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.45,363,1508828400"; d="scan'208";a="10644335" Received: from irsmsx153.ger.corp.intel.com ([163.33.192.75]) by fmsmga001.fm.intel.com with ESMTP; 04 Dec 2017 23:57:54 -0800 Received: from irsmsx155.ger.corp.intel.com (163.33.192.3) by IRSMSX153.ger.corp.intel.com (163.33.192.75) with Microsoft SMTP Server (TLS) id 14.3.319.2; Tue, 5 Dec 2017 07:57:53 +0000 Received: from irsmsx111.ger.corp.intel.com ([169.254.2.30]) by irsmsx155.ger.corp.intel.com ([169.254.14.169]) with mapi id 14.03.0319.002; Tue, 5 Dec 2017 07:57:53 +0000 From: "Rogovin, Kevin" To: "intel-gfx@lists.freedesktop.org" Thread-Topic: [PATCH 1/3] drm-uapi: define interface to kernel for scratch page read Thread-Index: AQHTbZ10KJF1vNED7EO6mE6U+xZSnKM0Ya1w Date: Tue, 5 Dec 2017 07:57:53 +0000 Message-ID: <5F28323D36A617439F1B0EC48B5E0D356AF0837B@irsmsx111.ger.corp.intel.com> References: <1512460094-4615-1-git-send-email-kevin.rogovin@intel.com> <1512460094-4615-2-git-send-email-kevin.rogovin@intel.com> In-Reply-To: <1512460094-4615-2-git-send-email-kevin.rogovin@intel.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: dlp-product: dlpe-windows dlp-version: 11.0.0.116 dlp-reaction: no-action x-titus-metadata-40: eyJDYXRlZ29yeUxhYmVscyI6IiIsIk1ldGFkYXRhIjp7Im5zIjoiaHR0cDpcL1wvd3d3LnRpdHVzLmNvbVwvbnNcL0ludGVsMyIsImlkIjoiNGY5MzE4M2MtYWUxYS00MzhkLTllNWMtZWUxN2YxODBlZmEyIiwicHJvcHMiOlt7Im4iOiJDVFBDbGFzc2lmaWNhdGlvbiIsInZhbHMiOlt7InZhbHVlIjoiQ1RQX0lDIn1dfV19LCJTdWJqZWN0TGFiZWxzIjpbXSwiVE1DVmVyc2lvbiI6IjE3LjIuNS4xOCIsIlRydXN0ZWRMYWJlbEhhc2giOiJ0OVZ2SzRSUXZHbjVmbytBOVFYVWN6QmNWSVwvTTZjNkxSOU5QWlRMTmxsdmpzb3JYVWNaa0hkZ1l6OWtMNXcyZSJ9 x-ctpclassification: CTP_IC x-originating-ip: [163.33.239.182] MIME-Version: 1.0 Subject: Re: [Intel-gfx] [PATCH 1/3] drm-uapi: define interface to kernel for scratch page read X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Virus-Scanned: ClamAV using ClamSMTP Sighs, I do not know why git send-email made this into two threads, but there it is. Worse, the second patch was from an older version; the one posted lacks the write to the scratch page with noise. At any rate, the thing is also on github at https://github.com/krogueintel/asem/tree/out-of-bounds-write-detect which has the initialization of the scratch page with noise. -Kevin -----Original Message----- From: Rogovin, Kevin Sent: Tuesday, December 5, 2017 9:48 AM To: intel-gfx@lists.freedesktop.org Cc: Rogovin, Kevin Subject: [PATCH 1/3] drm-uapi: define interface to kernel for scratch page read From: Kevin Rogovin --- include/drm-uapi/i915_drm.h | 31 +++++++++++++++++++++++++++++++ 1 file changed, 31 insertions(+) -- 2.15.0 diff --git a/include/drm-uapi/i915_drm.h b/include/drm-uapi/i915_drm.h index 890df227ae..3a9c3a2d0c 100644 --- a/include/drm-uapi/i915_drm.h +++ b/include/drm-uapi/i915_drm.h @@ -262,6 +262,8 @@ typedef struct _drm_i915_sarea { #define DRM_I915_PERF_OPEN 0x36 #define DRM_I915_PERF_ADD_CONFIG 0x37 #define DRM_I915_PERF_REMOVE_CONFIG 0x38 +#define DRM_I915_READ_SCRATCH_PAGE 0x39 +#define DRM_I915_WRITE_SCRATCH_PAGE 0x40 #define DRM_IOCTL_I915_INIT DRM_IOW( DRM_COMMAND_BASE + DRM_I915_INIT, drm_i915_init_t) #define DRM_IOCTL_I915_FLUSH DRM_IO ( DRM_COMMAND_BASE + DRM_I915_FLUSH) @@ -319,6 +321,8 @@ typedef struct _drm_i915_sarea { #define DRM_IOCTL_I915_PERF_OPEN DRM_IOW(DRM_COMMAND_BASE + DRM_I915_PERF_OPEN, struct drm_i915_perf_open_param) #define DRM_IOCTL_I915_PERF_ADD_CONFIG DRM_IOW(DRM_COMMAND_BASE + DRM_I915_PERF_ADD_CONFIG, struct drm_i915_perf_oa_config) #define DRM_IOCTL_I915_PERF_REMOVE_CONFIG DRM_IOW(DRM_COMMAND_BASE + DRM_I915_PERF_REMOVE_CONFIG, __u64) +#define DRM_IOCTL_I915_READ_SCRATCH_PAGE DRM_IOWR (DRM_COMMAND_BASE + DRM_I915_READ_SCRATCH_PAGE, struct drm_i915_scratch_page) +#define DRM_IOCTL_I915_WRITE_SCRATCH_PAGE DRM_IOWR (DRM_COMMAND_BASE + DRM_I915_WRITE_SCRATCH_PAGE, struct drm_i915_scratch_page) /* Allow drivers to submit batchbuffers directly to hardware, relying * on the security mechanisms provided by hardware. @@ -1535,6 +1539,33 @@ struct drm_i915_perf_oa_config { __u64 flex_regs_ptr; }; +/** + * Structure to read/write scratch page of PPGTT. Read and writing + * values are not reliable unless the calling application guarantees + * that no batchbuffer that could read or write the scratch is in + * flight using the PPGTT between the time the ioctl is issued and + * it returns. + */ +struct drm_i915_scratch_page { + /** + * size in bytes of the backing store pointed to by buffer_ptr; + * kernel will return the actual size of the scratch page in + * this field as well. + */ + __u32 buffer_size; + + /** + * Pointer data with which to upload to or download from the + * scratch page; if the buffer size behind buffer_ptr is + * smaller than the scratch page size, then only the first + * buffer_size bytes are read or written. If the scratch + * page size is greater than buffer_size, then the bytes + * past the scratch page size in buffer behind bufer_ptr + * are not read or writte. + */ + __u64 buffer_ptr; +}; + #if defined(__cplusplus) } #endif