| Message ID | 63f60c089d077a02b82e69888f553b3be067f07a.1454582914.git.jani.nikula@intel.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
On Thu, Feb 04, 2016 at 12:50:52PM +0200, Jani Nikula wrote: > Skip v3 gpio element because the support is not there, and skip gpio > element on non-vlv/chv because the sideband code is vlv/chv specific. > > Cc: drm-intel-fixes@lists.freedesktop.org > Fixes: 2a33d93486f2 ("drm/i915/bios: add support for MIPI sequence block v3") > Signed-off-by: Jani Nikula <jani.nikula@intel.com> > --- > drivers/gpu/drm/i915/intel_dsi_panel_vbt.c | 13 +++++++++++++ > 1 file changed, 13 insertions(+) > > diff --git a/drivers/gpu/drm/i915/intel_dsi_panel_vbt.c b/drivers/gpu/drm/i915/intel_dsi_panel_vbt.c > index f4d303ee538b..3e1e70f81506 100644 > --- a/drivers/gpu/drm/i915/intel_dsi_panel_vbt.c > +++ b/drivers/gpu/drm/i915/intel_dsi_panel_vbt.c > @@ -205,6 +205,9 @@ static const u8 *mipi_exec_gpio(struct intel_dsi *intel_dsi, const u8 *data) > struct drm_device *dev = intel_dsi->base.base.dev; > struct drm_i915_private *dev_priv = dev->dev_private; > > + if (dev_priv->vbt.dsi.seq_version >= 3) > + data++; > + > gpio = *data++; > > /* pull up/down */ > @@ -215,6 +218,16 @@ static const u8 *mipi_exec_gpio(struct intel_dsi *intel_dsi, const u8 *data) > goto out; > } > > + if (!IS_VALLEYVIEW(dev_priv) && !IS_CHERRYVIEW(dev_priv)) { > + DRM_DEBUG_KMS("GPIO element not supported on this platform\n"); > + goto out; > + } The gpio register table is VLV specific. So CHV shall not pass. > + > + if (dev_priv->vbt.dsi.seq_version >= 3) { > + DRM_DEBUG_KMS("GPIO element v3 not supported\n"); > + goto out; > + } > + > function = gtable[gpio].function_reg; > pad = gtable[gpio].pad_reg; > > -- > 2.1.4 > > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@lists.freedesktop.org > http://lists.freedesktop.org/mailman/listinfo/intel-gfx
diff --git a/drivers/gpu/drm/i915/intel_dsi_panel_vbt.c b/drivers/gpu/drm/i915/intel_dsi_panel_vbt.c index f4d303ee538b..3e1e70f81506 100644 --- a/drivers/gpu/drm/i915/intel_dsi_panel_vbt.c +++ b/drivers/gpu/drm/i915/intel_dsi_panel_vbt.c @@ -205,6 +205,9 @@ static const u8 *mipi_exec_gpio(struct intel_dsi *intel_dsi, const u8 *data) struct drm_device *dev = intel_dsi->base.base.dev; struct drm_i915_private *dev_priv = dev->dev_private; + if (dev_priv->vbt.dsi.seq_version >= 3) + data++; + gpio = *data++; /* pull up/down */ @@ -215,6 +218,16 @@ static const u8 *mipi_exec_gpio(struct intel_dsi *intel_dsi, const u8 *data) goto out; } + if (!IS_VALLEYVIEW(dev_priv) && !IS_CHERRYVIEW(dev_priv)) { + DRM_DEBUG_KMS("GPIO element not supported on this platform\n"); + goto out; + } + + if (dev_priv->vbt.dsi.seq_version >= 3) { + DRM_DEBUG_KMS("GPIO element v3 not supported\n"); + goto out; + } + function = gtable[gpio].function_reg; pad = gtable[gpio].pad_reg;
Skip v3 gpio element because the support is not there, and skip gpio element on non-vlv/chv because the sideband code is vlv/chv specific. Cc: drm-intel-fixes@lists.freedesktop.org Fixes: 2a33d93486f2 ("drm/i915/bios: add support for MIPI sequence block v3") Signed-off-by: Jani Nikula <jani.nikula@intel.com> --- drivers/gpu/drm/i915/intel_dsi_panel_vbt.c | 13 +++++++++++++ 1 file changed, 13 insertions(+)