diff mbox series

[v2,8/8] drm/i915/psr: use intel_de_*() functions for register access

Message ID 652e16e6168691f89b5cb8c91278a0d960f8f1a9.1580149467.git.jani.nikula@intel.com (mailing list archive)
State New, archived
Headers show
Series drm/i915/display: mass conversion to intel_de_*() register accessors | expand

Commit Message

Jani Nikula Jan. 27, 2020, 6:26 p.m. UTC 
The implicit "dev_priv" local variable use has been a long-standing pain
point in the register access macros I915_READ(), I915_WRITE(),
POSTING_READ(), I915_READ_FW(), and I915_WRITE_FW().

Replace them with the corresponding new display engine register
accessors intel_de_read(), intel_de_write(), intel_de_posting_read(),
intel_de_read_fw(), and intel_de_write_fw().

No functional changes.

Generated using the following semantic patch:

@@
expression REG, OFFSET;
@@
- I915_READ(REG)
+ intel_de_read(dev_priv, REG)

@@
expression REG, OFFSET;
@@
- POSTING_READ(REG)
+ intel_de_posting_read(dev_priv, REG)

@@
expression REG, OFFSET;
@@
- I915_WRITE(REG, OFFSET)
+ intel_de_write(dev_priv, REG, OFFSET)

@@
expression REG;
@@
- I915_READ_FW(REG)
+ intel_de_read_fw(dev_priv, REG)

@@
expression REG, OFFSET;
@@
- I915_WRITE_FW(REG, OFFSET)
+ intel_de_write_fw(dev_priv, REG, OFFSET)

Acked-by: Chris Wilson <chris@chris-wilson.co.uk>
Acked-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Acked-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
 drivers/gpu/drm/i915/display/intel_psr.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)
diff mbox series

Patch

diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c
index b9dd9763c0f7..e41ed962aa80 100644
--- a/drivers/gpu/drm/i915/display/intel_psr.c
+++ b/drivers/gpu/drm/i915/display/intel_psr.c
@@ -832,11 +832,11 @@  static void intel_psr_enable_source(struct intel_dp *intel_dp,
 		 * TODO: if future platforms supports DC3CO in more than one
 		 * transcoder, EXITLINE will need to be unset when disabling PSR
 		 */
-		val = I915_READ(EXITLINE(cpu_transcoder));
+		val = intel_de_read(dev_priv, EXITLINE(cpu_transcoder));
 		val &= ~EXITLINE_MASK;
 		val |= crtc_state->dc3co_exitline << EXITLINE_SHIFT;
 		val |= EXITLINE_ENABLE;
-		I915_WRITE(EXITLINE(cpu_transcoder), val);
+		intel_de_write(dev_priv, EXITLINE(cpu_transcoder), val);
 	}
 }