From patchwork Fri Jun 7 10:51:27 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jani Nikula X-Patchwork-Id: 13689677 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 346E2C27C53 for ; Fri, 7 Jun 2024 10:52:05 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id C08F510EBC6; Fri, 7 Jun 2024 10:52:04 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="YHKi1vmf"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.18]) by gabe.freedesktop.org (Postfix) with ESMTPS id 862A410EBC6; Fri, 7 Jun 2024 10:52:03 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1717757524; x=1749293524; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=DNgc7F4WzCL2tRkf25GFqCdHb22+anV34UcNBsCVl7o=; b=YHKi1vmfD4zcgVm2+7jpzrmRk3md80vOXftyRG2OBzG8BwvAQUV6TMvJ XXirWe87OVeB46fEyfYZB4UKk4nf1dYDgDfZMfOmHfbDEPS/AvC6v3CkZ A5eV/goOJxAKUIQfdr+U9NKVOEoZRA6KkWpZM9xyHoPT5y6cP6PSe1YfL jAD+H+x13UWPCzG/n9NGqIQOdIOvV3bxrmzOdvyOvkZp7yImb5DEQIEwn nT6KCiSWNxkyq5q52ZYINa6M0M96ovJP0Aek3JD6JxnB+mIYTA6PPZL+4 MT4lnACwK/eaj+JNfEVRXWvkYeUMCA1elWWyAalsZb6ZQIr4L3nQU1rXX g==; X-CSE-ConnectionGUID: X2GTVr5xTi6HXqFjev5GIQ== X-CSE-MsgGUID: T9VkEBy2RACuNu/BSsJfUA== X-IronPort-AV: E=McAfee;i="6600,9927,11095"; a="14215138" X-IronPort-AV: E=Sophos;i="6.08,220,1712646000"; d="scan'208";a="14215138" Received: from orviesa008.jf.intel.com ([10.64.159.148]) by fmvoesa112.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 07 Jun 2024 03:52:03 -0700 X-CSE-ConnectionGUID: z3xFWf4vTnmoxJPHO7HaBw== X-CSE-MsgGUID: XM7r8y7DTeyA1jVuI7CnTg== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.08,220,1712646000"; d="scan'208";a="38864497" Received: from cpetruta-mobl1.ger.corp.intel.com (HELO localhost) ([10.245.246.72]) by orviesa008-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 07 Jun 2024 03:51:59 -0700 From: Jani Nikula To: intel-gfx@lists.freedesktop.org, intel-gvt-dev@lists.freedesktop.org Cc: rodrigo.vivi@intel.com, ville.syrjala@linux.intel.com, jani.nikula@intel.com, Zhenyu Wang , Zhi Wang Subject: [PATCH 4/6] drm/i915/gvt: do not use implict dev_priv in DSPSURF_TO_PIPE() Date: Fri, 7 Jun 2024 13:51:27 +0300 Message-Id: <72a659d5f49deab4d956abbce04cfc8a78f97b4f.1717757337.git.jani.nikula@intel.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: References: MIME-Version: 1.0 Organization: Intel Finland Oy - BIC 0357606-4 - Westendinkatu 7, 02160 Espoo X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Do not rely on having dev_priv local variable, pass it to the macro. Cc: Zhenyu Wang Cc: Zhi Wang Cc: intel-gvt-dev@lists.freedesktop.org Signed-off-by: Jani Nikula --- drivers/gpu/drm/i915/gvt/handlers.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/i915/gvt/handlers.c b/drivers/gpu/drm/i915/gvt/handlers.c index f79dd6cfc75b..0f09344d3c20 100644 --- a/drivers/gpu/drm/i915/gvt/handlers.c +++ b/drivers/gpu/drm/i915/gvt/handlers.c @@ -1009,14 +1009,14 @@ static int south_chicken2_mmio_write(struct intel_vgpu *vgpu, return 0; } -#define DSPSURF_TO_PIPE(offset) \ +#define DSPSURF_TO_PIPE(dev_priv, offset) \ calc_index(offset, DSPSURF(dev_priv, PIPE_A), DSPSURF(dev_priv, PIPE_B), DSPSURF(dev_priv, PIPE_C)) static int pri_surf_mmio_write(struct intel_vgpu *vgpu, unsigned int offset, void *p_data, unsigned int bytes) { struct drm_i915_private *dev_priv = vgpu->gvt->gt->i915; - u32 pipe = DSPSURF_TO_PIPE(offset); + u32 pipe = DSPSURF_TO_PIPE(dev_priv, offset); int event = SKL_FLIP_EVENT(pipe, PLANE_PRIMARY); write_vreg(vgpu, offset, p_data, bytes);