From patchwork Fri Jan 15 12:24:08 2010 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Daniel Vetter X-Patchwork-Id: 73150 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by demeter.kernel.org (8.14.3/8.14.2) with ESMTP id o0FCOC2B003204 for ; Fri, 15 Jan 2010 12:24:12 GMT Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 93F879F4C1; Fri, 15 Jan 2010 04:24:12 -0800 (PST) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mail.ffwll.ch (cable-static-49-187.intergga.ch [157.161.49.187]) by gabe.freedesktop.org (Postfix) with ESMTP id 3B16A9F4BB for ; Fri, 15 Jan 2010 04:24:08 -0800 (PST) Received: by mail.ffwll.ch (Postfix, from userid 1000) id 3DF3120C206; Fri, 15 Jan 2010 13:24:08 +0100 (CET) X-Spam-ASN: X-Spam-Checker-Version: SpamAssassin 3.2.5 (2008-06-10) on orange.ffwll.ch X-Spam-Level: X-Spam-Hammy: 0.000-+--struct, 0.000-+--signedoffby, 0.000-+--signed-off-by X-Spam-Status: No, score=-1.2 required=6.0 tests=ALL_TRUSTED,BAYES_00, FH_DATE_PAST_20XX autolearn=no version=3.2.5 X-Spam-Spammy: 0.967-+--H*m:ffwll, 0.964-+--H*Ad:U*daniel.vetter, 0.953-+--H*r:mail.ffwll.ch Received: from biene (unknown [192.168.23.129]) by mail.ffwll.ch (Postfix) with ESMTP id 1F30520C205; Fri, 15 Jan 2010 13:23:54 +0100 (CET) Received: from daniel by biene with local (Exim 4.71) (envelope-from ) id 1NVlE1-0003h7-5A; Fri, 15 Jan 2010 13:24:25 +0100 From: Daniel Vetter To: intel-gfx@lists.freedesktop.org Date: Fri, 15 Jan 2010 13:24:08 +0100 Message-Id: <74471ded981086a7e563554dd9d0ea490fb31a88.1263558064.git.daniel.vetter@ffwll.ch> X-Mailer: git-send-email 1.6.6 In-Reply-To: References: In-Reply-To: References: Cc: Daniel Vetter Subject: [Intel-gfx] [PATCH 01/11] drm/i915: flush CPU wc cache when flushing GTT write domain X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.9 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: intel-gfx-bounces@lists.freedesktop.org Errors-To: intel-gfx-bounces@lists.freedesktop.org diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c index d55541c..43b3b78 100644 --- a/drivers/gpu/drm/i915/i915_gem.c +++ b/drivers/gpu/drm/i915/i915_gem.c @@ -2558,12 +2558,12 @@ i915_gem_object_put_fence_reg(struct drm_gem_object *obj) int ret; i915_gem_object_flush_gpu_write_domain(obj); - i915_gem_object_flush_gtt_write_domain(obj); ret = i915_gem_object_wait_rendering(obj); if (ret != 0) return ret; } + i915_gem_object_flush_gtt_write_domain(obj); i915_gem_clear_fence_reg (obj); return 0; @@ -2733,6 +2733,7 @@ i915_gem_object_flush_gpu_write_domain(struct drm_gem_object *obj) static void i915_gem_object_flush_gtt_write_domain(struct drm_gem_object *obj) { + drm_i915_private_t *dev_priv = obj->dev->dev_private; uint32_t old_write_domain; if (obj->write_domain != I915_GEM_DOMAIN_GTT) @@ -2741,7 +2742,11 @@ i915_gem_object_flush_gtt_write_domain(struct drm_gem_object *obj) /* No actual flushing is required for the GTT write domain. Writes * to it immediately go to main memory as far as we know, so there's * no chipset flush. It also doesn't land in render cache. + * But flush the wc cache on the CPU. For otherwise the fence teardown + * for tiled buffers is not synchronized with any outstanding writes. */ + I915_READ(IMR); + old_write_domain = obj->write_domain; obj->write_domain = 0;