From patchwork Fri Mar 26 13:21:35 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Jani Nikula X-Patchwork-Id: 12166625 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.8 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id C2FF0C433DB for ; Fri, 26 Mar 2021 13:22:08 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 66B9761A06 for ; Fri, 26 Mar 2021 13:22:08 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 66B9761A06 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=intel.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=intel-gfx-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id E68D36F3D8; Fri, 26 Mar 2021 13:22:07 +0000 (UTC) Received: from mga04.intel.com (mga04.intel.com [192.55.52.120]) by gabe.freedesktop.org (Postfix) with ESMTPS id 828706F3D5 for ; Fri, 26 Mar 2021 13:22:06 +0000 (UTC) IronPort-SDR: x+eB/IARdHHin951fa3pG2nEb3rax29MpSyEg0UCGWkTwdtZnwtaxMNAn+Kb6fhICWOnC62SJm Yc1sKRf/i9Yg== X-IronPort-AV: E=McAfee;i="6000,8403,9934"; a="188870128" X-IronPort-AV: E=Sophos;i="5.81,280,1610438400"; d="scan'208";a="188870128" Received: from fmsmga008.fm.intel.com ([10.253.24.58]) by fmsmga104.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 26 Mar 2021 06:22:06 -0700 IronPort-SDR: 1oWMCM1qhRax9a31iZLqAOj/12Wl1CRZyJ25eIG0Rqsc4jpwdnbBgRYcRg2Hzaeae7UbCl42Rl vru6fN8ARqJg== X-IronPort-AV: E=Sophos;i="5.81,280,1610438400"; d="scan'208";a="409896437" Received: from mpaulits-mobl1.ger.corp.intel.com (HELO localhost) ([10.252.55.191]) by fmsmga008-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 26 Mar 2021 06:22:04 -0700 From: Jani Nikula To: intel-gfx@lists.freedesktop.org Date: Fri, 26 Mar 2021 15:21:35 +0200 Message-Id: <756fe3d75b1e91ef812fc1fd3f70337e9c571d91.1616764798.git.jani.nikula@intel.com> X-Mailer: git-send-email 2.20.1 In-Reply-To: References: MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH v4 4/7] drm/i915: switch TGL and ADL to the new stepping scheme X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: jani.nikula@intel.com Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" This changes the way revids not present in the array are handled: - For gaps in the array, the next present revid is used. - For revids beyond the array, the new STEP_FUTURE is used instead of the last revid in the array. In both cases, we'll get debug logging of what's going on. v2: Rename stepping->step Reviewed-by: José Roberto de Souza Signed-off-by: Jani Nikula --- drivers/gpu/drm/i915/i915_drv.h | 59 ++++++++----------------------- drivers/gpu/drm/i915/intel_step.c | 17 ++++++--- drivers/gpu/drm/i915/intel_step.h | 8 ----- 3 files changed, 28 insertions(+), 56 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index ff392f7c8507..d1d253f7132d 100644 --- a/drivers/gpu/drm/i915/i915_drv.h +++ b/drivers/gpu/drm/i915/i915_drv.h @@ -1501,44 +1501,17 @@ IS_SUBPLATFORM(const struct drm_i915_private *i915, #define IS_JSL_EHL_REVID(p, since, until) \ (IS_JSL_EHL(p) && IS_REVID(p, since, until)) -static inline const struct i915_rev_steppings * -tgl_stepping_get(struct drm_i915_private *dev_priv) -{ - u8 revid = INTEL_REVID(dev_priv); - u8 size; - const struct i915_rev_steppings *revid_step_tbl; - - if (IS_ALDERLAKE_S(dev_priv)) { - revid_step_tbl = adls_revid_step_tbl; - size = ARRAY_SIZE(adls_revid_step_tbl); - } else if (IS_TGL_U(dev_priv) || IS_TGL_Y(dev_priv)) { - revid_step_tbl = tgl_uy_revid_step_tbl; - size = ARRAY_SIZE(tgl_uy_revid_step_tbl); - } else { - revid_step_tbl = tgl_revid_step_tbl; - size = ARRAY_SIZE(tgl_revid_step_tbl); - } - - revid = min_t(u8, revid, size - 1); - - return &revid_step_tbl[revid]; -} - -#define IS_TGL_DISP_STEPPING(p, since, until) \ - (IS_TIGERLAKE(p) && \ - tgl_stepping_get(p)->disp_stepping >= (since) && \ - tgl_stepping_get(p)->disp_stepping <= (until)) +#define IS_TGL_DISP_STEPPING(__i915, since, until) \ + (IS_TIGERLAKE(__i915) && \ + IS_DISPLAY_STEP(__i915, since, until)) -#define IS_TGL_UY_GT_STEPPING(p, since, until) \ - ((IS_TGL_U(p) || IS_TGL_Y(p)) && \ - tgl_stepping_get(p)->gt_stepping >= (since) && \ - tgl_stepping_get(p)->gt_stepping <= (until)) +#define IS_TGL_UY_GT_STEPPING(__i915, since, until) \ + ((IS_TGL_U(__i915) || IS_TGL_Y(__i915)) && \ + IS_GT_STEP(__i915, since, until)) -#define IS_TGL_GT_STEPPING(p, since, until) \ - (IS_TIGERLAKE(p) && \ - !(IS_TGL_U(p) || IS_TGL_Y(p)) && \ - tgl_stepping_get(p)->gt_stepping >= (since) && \ - tgl_stepping_get(p)->gt_stepping <= (until)) +#define IS_TGL_GT_STEPPING(__i915, since, until) \ + (IS_TIGERLAKE(__i915) && !(IS_TGL_U(__i915) || IS_TGL_Y(__i915)) && \ + IS_GT_STEP(__i915, since, until)) #define RKL_REVID_A0 0x0 #define RKL_REVID_B0 0x1 @@ -1553,15 +1526,13 @@ tgl_stepping_get(struct drm_i915_private *dev_priv) #define IS_DG1_REVID(p, since, until) \ (IS_DG1(p) && IS_REVID(p, since, until)) -#define IS_ADLS_DISP_STEPPING(p, since, until) \ - (IS_ALDERLAKE_S(p) && \ - tgl_stepping_get(p)->disp_stepping >= (since) && \ - tgl_stepping_get(p)->disp_stepping <= (until)) +#define IS_ADLS_DISP_STEPPING(__i915, since, until) \ + (IS_ALDERLAKE_S(__i915) && \ + IS_DISPLAY_STEP(__i915, since, until)) -#define IS_ADLS_GT_STEPPING(p, since, until) \ - (IS_ALDERLAKE_S(p) && \ - tgl_stepping_get(p)->gt_stepping >= (since) && \ - tgl_stepping_get(p)->gt_stepping <= (until)) +#define IS_ADLS_GT_STEPPING(__i915, since, until) \ + (IS_ALDERLAKE_S(__i915) && \ + IS_GT_STEP(__i915, since, until)) #define IS_LP(dev_priv) (INTEL_INFO(dev_priv)->is_lp) #define IS_GEN9_LP(dev_priv) (IS_GEN(dev_priv, 9) && IS_LP(dev_priv)) diff --git a/drivers/gpu/drm/i915/intel_step.c b/drivers/gpu/drm/i915/intel_step.c index e9ff481b2eda..f6298622c53e 100644 --- a/drivers/gpu/drm/i915/intel_step.c +++ b/drivers/gpu/drm/i915/intel_step.c @@ -26,7 +26,7 @@ static const struct i915_rev_steppings kbl_revids[] = { [7] = { .gt_stepping = STEP_G0, .disp_stepping = STEP_C0 }, }; -const struct i915_rev_steppings tgl_uy_revid_step_tbl[] = { +static const struct i915_rev_steppings tgl_uy_revid_step_tbl[] = { [0] = { .gt_stepping = STEP_A0, .disp_stepping = STEP_A0 }, [1] = { .gt_stepping = STEP_B0, .disp_stepping = STEP_C0 }, [2] = { .gt_stepping = STEP_B1, .disp_stepping = STEP_C0 }, @@ -34,12 +34,12 @@ const struct i915_rev_steppings tgl_uy_revid_step_tbl[] = { }; /* Same GT stepping between tgl_uy_revids and tgl_revids don't mean the same HW */ -const struct i915_rev_steppings tgl_revid_step_tbl[] = { +static const struct i915_rev_steppings tgl_revid_step_tbl[] = { [0] = { .gt_stepping = STEP_A0, .disp_stepping = STEP_B0 }, [1] = { .gt_stepping = STEP_B0, .disp_stepping = STEP_D0 }, }; -const struct i915_rev_steppings adls_revid_step_tbl[] = { +static const struct i915_rev_steppings adls_revid_step_tbl[] = { [0x0] = { .gt_stepping = STEP_A0, .disp_stepping = STEP_A0 }, [0x1] = { .gt_stepping = STEP_A0, .disp_stepping = STEP_A2 }, [0x4] = { .gt_stepping = STEP_B0, .disp_stepping = STEP_B0 }, @@ -54,7 +54,16 @@ void intel_step_init(struct drm_i915_private *i915) int revid = INTEL_REVID(i915); struct i915_rev_steppings step = {}; - if (IS_KABYLAKE(i915)) { + if (IS_ALDERLAKE_S(i915)) { + revids = adls_revid_step_tbl; + size = ARRAY_SIZE(adls_revid_step_tbl); + } else if (IS_TGL_U(i915) || IS_TGL_Y(i915)) { + revids = tgl_uy_revid_step_tbl; + size = ARRAY_SIZE(tgl_uy_revid_step_tbl); + } else if (IS_TIGERLAKE(i915)) { + revids = tgl_revid_step_tbl; + size = ARRAY_SIZE(tgl_revid_step_tbl); + } else if (IS_KABYLAKE(i915)) { revids = kbl_revids; size = ARRAY_SIZE(kbl_revids); } diff --git a/drivers/gpu/drm/i915/intel_step.h b/drivers/gpu/drm/i915/intel_step.h index b29e15f71214..5cc5601794f0 100644 --- a/drivers/gpu/drm/i915/intel_step.h +++ b/drivers/gpu/drm/i915/intel_step.h @@ -15,14 +15,6 @@ struct i915_rev_steppings { u8 disp_stepping; }; -#define TGL_UY_REVID_STEP_TBL_SIZE 4 -#define TGL_REVID_STEP_TBL_SIZE 2 -#define ADLS_REVID_STEP_TBL_SIZE 13 - -extern const struct i915_rev_steppings tgl_uy_revid_step_tbl[TGL_UY_REVID_STEP_TBL_SIZE]; -extern const struct i915_rev_steppings tgl_revid_step_tbl[TGL_REVID_STEP_TBL_SIZE]; -extern const struct i915_rev_steppings adls_revid_step_tbl[ADLS_REVID_STEP_TBL_SIZE]; - /* * Symbolic steppings that do not match the hardware. These are valid both as gt * and display steppings as symbolic names.