From patchwork Fri Apr 29 19:56:29 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Dixit, Ashutosh" X-Patchwork-Id: 12832686 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id C4236C433F5 for ; Fri, 29 Apr 2022 19:56:49 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id EB8E410F0D8; Fri, 29 Apr 2022 19:56:47 +0000 (UTC) Received: from mga12.intel.com (mga12.intel.com [192.55.52.136]) by gabe.freedesktop.org (Postfix) with ESMTPS id 7E5D810EF52 for ; Fri, 29 Apr 2022 19:56:38 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; 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29 Apr 2022 12:56:37 -0700 From: Ashutosh Dixit To: intel-gfx@lists.freedesktop.org Date: Fri, 29 Apr 2022 12:56:29 -0700 Message-Id: <780dd0b3fc786ad8272b231a62bc2487ef832e58.1651261886.git.ashutosh.dixit@intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: References: MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH 8/8] drm/i915/gt: Expose default value for media_freq_factor in per-gt sysfs X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Add the following sysfs file to gt/gtN/.defaults: * media_freq_factor Cc: Joonas Lahtinen Signed-off-by: Ashutosh Dixit Reviewed-by: Rodrigo Vivi --- drivers/gpu/drm/i915/gt/intel_gt_sysfs_pm.c | 18 ++++++++++++++++++ drivers/gpu/drm/i915/gt/intel_gt_types.h | 1 + drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.c | 2 ++ 3 files changed, 21 insertions(+) diff --git a/drivers/gpu/drm/i915/gt/intel_gt_sysfs_pm.c b/drivers/gpu/drm/i915/gt/intel_gt_sysfs_pm.c index 5a191973322e..3a6e22d31d46 100644 --- a/drivers/gpu/drm/i915/gt/intel_gt_sysfs_pm.c +++ b/drivers/gpu/drm/i915/gt/intel_gt_sysfs_pm.c @@ -759,6 +759,18 @@ default_boost_freq_mhz_show(struct kobject *kobj, struct kobj_attribute *attr, c static struct kobj_attribute default_boost_freq_mhz = __ATTR(rps_boost_freq_mhz, 0444, default_boost_freq_mhz_show, NULL); +static ssize_t +default_media_freq_factor_show(struct kobject *kobj, struct kobj_attribute *attr, char *buf) +{ + struct intel_gt *gt = kobj_to_gt(kobj->parent); + + return sysfs_emit(buf, "%d\n", + media_ratio_mode_to_factor(gt->rps_defaults.media_ratio_mode)); +} + +static struct kobj_attribute default_media_freq_factor = +__ATTR(media_freq_factor, 0444, default_media_freq_factor_show, NULL); + static const struct attribute * const rps_defaults_attrs[] = { &default_min_freq_mhz.attr, &default_max_freq_mhz.attr, @@ -819,6 +831,12 @@ void intel_gt_sysfs_pm_init(struct intel_gt *gt, struct kobject *kobj) drm_warn(>->i915->drm, "failed to create add gt%u media_perf_power_attrs sysfs (%pe)\n", gt->info.id, ERR_PTR(ret)); + + ret = sysfs_create_file(gt->sysfs_defaults, &default_media_freq_factor.attr); + if (ret) + drm_warn(>->i915->drm, + "failed to add gt%u default_media_freq_factor sysfs (%pe)\n", + gt->info.id, ERR_PTR(ret)); } ret = add_rps_defaults(gt); diff --git a/drivers/gpu/drm/i915/gt/intel_gt_types.h b/drivers/gpu/drm/i915/gt/intel_gt_types.h index 8b696669b846..07d368ca78ca 100644 --- a/drivers/gpu/drm/i915/gt/intel_gt_types.h +++ b/drivers/gpu/drm/i915/gt/intel_gt_types.h @@ -66,6 +66,7 @@ struct intel_rps_defaults { u32 min_freq; u32 max_freq; u32 boost_freq; + u32 media_ratio_mode; }; enum intel_submission_method { diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.c b/drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.c index cefd864c84eb..047c80838fcd 100644 --- a/drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.c +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.c @@ -260,7 +260,9 @@ int intel_guc_slpc_init(struct intel_guc_slpc *slpc) slpc->boost_freq = 0; atomic_set(&slpc->num_waiters, 0); slpc->num_boosts = 0; + slpc->media_ratio_mode = SLPC_MEDIA_RATIO_MODE_DYNAMIC_CONTROL; + slpc_to_gt(slpc)->rps_defaults.media_ratio_mode = slpc->media_ratio_mode; mutex_init(&slpc->lock); INIT_WORK(&slpc->boost_work, slpc_boost_work);