diff mbox series

[5/5] drm/i915: split out gem/i915_gem_domain.h from i915_drv.h

Message ID 7c018d4a741ecb98dc1a19a7fdb6b35943790ff9.1641977369.git.jani.nikula@intel.com (mailing list archive)
State New, archived
Headers show
Series drm/i915: clean up i915_drv.h, part 2, take 2... | expand

Commit Message

Jani Nikula Jan. 12, 2022, 8:51 a.m. UTC 
We already have the gem/i915_gem_domain.c file.

Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
 drivers/gpu/drm/i915/display/intel_dpt.c    |  4 +++-
 drivers/gpu/drm/i915/display/intel_fb_pin.c |  1 +
 drivers/gpu/drm/i915/gem/i915_gem_domain.c  |  5 +++--
 drivers/gpu/drm/i915/gem/i915_gem_domain.h  | 15 +++++++++++++++
 drivers/gpu/drm/i915/i915_drv.h             |  3 ---
 5 files changed, 22 insertions(+), 6 deletions(-)
 create mode 100644 drivers/gpu/drm/i915/gem/i915_gem_domain.h

Comments

Maarten Lankhorst Jan. 24, 2022, 12:19 p.m. UTC | #1 
Op 12-01-2022 om 09:51 schreef Jani Nikula:
> We already have the gem/i915_gem_domain.c file.
>
> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_dpt.c    |  4 +++-
>  drivers/gpu/drm/i915/display/intel_fb_pin.c |  1 +
>  drivers/gpu/drm/i915/gem/i915_gem_domain.c  |  5 +++--
>  drivers/gpu/drm/i915/gem/i915_gem_domain.h  | 15 +++++++++++++++
>  drivers/gpu/drm/i915/i915_drv.h             |  3 ---
>  5 files changed, 22 insertions(+), 6 deletions(-)
>  create mode 100644 drivers/gpu/drm/i915/gem/i915_gem_domain.h
>
> diff --git a/drivers/gpu/drm/i915/display/intel_dpt.c b/drivers/gpu/drm/i915/display/intel_dpt.c
> index 63a83d5f85a1..16b273e19d17 100644
> --- a/drivers/gpu/drm/i915/display/intel_dpt.c
> +++ b/drivers/gpu/drm/i915/display/intel_dpt.c
> @@ -3,11 +3,13 @@
>   * Copyright © 2021 Intel Corporation
>   */
>  
> +#include "gem/i915_gem_domain.h"
> +#include "gt/gen8_ppgtt.h"
> +
>  #include "i915_drv.h"
>  #include "intel_display_types.h"
>  #include "intel_dpt.h"
>  #include "intel_fb.h"
> -#include "gt/gen8_ppgtt.h"
>  
>  struct i915_dpt {
>  	struct i915_address_space vm;
> diff --git a/drivers/gpu/drm/i915/display/intel_fb_pin.c b/drivers/gpu/drm/i915/display/intel_fb_pin.c
> index 31c15e5fca95..e60046d90124 100644
> --- a/drivers/gpu/drm/i915/display/intel_fb_pin.c
> +++ b/drivers/gpu/drm/i915/display/intel_fb_pin.c
> @@ -7,6 +7,7 @@
>   * DOC: display pinning helpers
>   */
>  
> +#include "gem/i915_gem_domain.h"
>  #include "gem/i915_gem_object.h"
>  
>  #include "i915_drv.h"
> diff --git a/drivers/gpu/drm/i915/gem/i915_gem_domain.c b/drivers/gpu/drm/i915/gem/i915_gem_domain.c
> index 26532c07d467..3e5d6057b3ef 100644
> --- a/drivers/gpu/drm/i915/gem/i915_gem_domain.c
> +++ b/drivers/gpu/drm/i915/gem/i915_gem_domain.c
> @@ -9,12 +9,13 @@
>  
>  #include "i915_drv.h"
>  #include "i915_gem_clflush.h"
> +#include "i915_gem_domain.h"
>  #include "i915_gem_gtt.h"
>  #include "i915_gem_ioctls.h"
> -#include "i915_gem_object.h"
> -#include "i915_vma.h"
>  #include "i915_gem_lmem.h"
>  #include "i915_gem_mman.h"
> +#include "i915_gem_object.h"
> +#include "i915_vma.h"
>  
>  static bool gpu_write_needs_clflush(struct drm_i915_gem_object *obj)
>  {
> diff --git a/drivers/gpu/drm/i915/gem/i915_gem_domain.h b/drivers/gpu/drm/i915/gem/i915_gem_domain.h
> new file mode 100644
> index 000000000000..9622df962bfc
> --- /dev/null
> +++ b/drivers/gpu/drm/i915/gem/i915_gem_domain.h
> @@ -0,0 +1,15 @@
> +/* SPDX-License-Identifier: MIT */
> +/*
> + * Copyright © 2022 Intel Corporation
> + */
> +
> +#ifndef __I915_GEM_DOMAIN_H__
> +#define __I915_GEM_DOMAIN_H__
> +
> +struct drm_i915_gem_object;
> +enum i915_cache_level;
> +
> +int i915_gem_object_set_cache_level(struct drm_i915_gem_object *obj,
> +				    enum i915_cache_level cache_level);
> +
> +#endif /* __I915_GEM_DOMAIN_H__ */
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index 95899661d567..32cd07e144dc 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -1686,9 +1686,6 @@ void i915_gem_driver_release(struct drm_i915_private *dev_priv);
>  
>  int i915_gem_open(struct drm_i915_private *i915, struct drm_file *file);
>  
> -int i915_gem_object_set_cache_level(struct drm_i915_gem_object *obj,
> -				    enum i915_cache_level cache_level);
> -
>  static inline struct i915_address_space *
>  i915_gem_vm_lookup(struct drm_i915_file_private *file_priv, u32 id)
>  {

All looks sane.

Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Jani Nikula Jan. 25, 2022, 3:25 p.m. UTC | #2 
On Mon, 24 Jan 2022, Maarten Lankhorst <maarten.lankhorst@linux.intel.com> wrote:
> All looks sane.
>
> Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>

Thanks... but I didn't realize this already conflicts between
drm-intel-next and drm-intel-gt-next. I wonder what the best plan would
be for making this happen.

BR,
Jani.
Maarten Lankhorst Jan. 26, 2022, 7:22 a.m. UTC | #3 
Op 25-01-2022 om 16:25 schreef Jani Nikula:
> On Mon, 24 Jan 2022, Maarten Lankhorst <maarten.lankhorst@linux.intel.com> wrote:
>> All looks sane.
>>
>> Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
> Thanks... but I didn't realize this already conflicts between
> drm-intel-next and drm-intel-gt-next. I wonder what the best plan would
> be for making this happen.
>
> BR,
> Jani.
>
>
push into drm-intel-next + fixup patch in drm-tip for gt-next, hope nobody notices?
diff mbox series

Patch

diff --git a/drivers/gpu/drm/i915/display/intel_dpt.c b/drivers/gpu/drm/i915/display/intel_dpt.c
index 63a83d5f85a1..16b273e19d17 100644
--- a/drivers/gpu/drm/i915/display/intel_dpt.c
+++ b/drivers/gpu/drm/i915/display/intel_dpt.c
@@ -3,11 +3,13 @@ 
  * Copyright © 2021 Intel Corporation
  */
 
+#include "gem/i915_gem_domain.h"
+#include "gt/gen8_ppgtt.h"
+
 #include "i915_drv.h"
 #include "intel_display_types.h"
 #include "intel_dpt.h"
 #include "intel_fb.h"
-#include "gt/gen8_ppgtt.h"
 
 struct i915_dpt {
 	struct i915_address_space vm;
diff --git a/drivers/gpu/drm/i915/display/intel_fb_pin.c b/drivers/gpu/drm/i915/display/intel_fb_pin.c
index 31c15e5fca95..e60046d90124 100644
--- a/drivers/gpu/drm/i915/display/intel_fb_pin.c
+++ b/drivers/gpu/drm/i915/display/intel_fb_pin.c
@@ -7,6 +7,7 @@ 
  * DOC: display pinning helpers
  */
 
+#include "gem/i915_gem_domain.h"
 #include "gem/i915_gem_object.h"
 
 #include "i915_drv.h"
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_domain.c b/drivers/gpu/drm/i915/gem/i915_gem_domain.c
index 26532c07d467..3e5d6057b3ef 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_domain.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_domain.c
@@ -9,12 +9,13 @@ 
 
 #include "i915_drv.h"
 #include "i915_gem_clflush.h"
+#include "i915_gem_domain.h"
 #include "i915_gem_gtt.h"
 #include "i915_gem_ioctls.h"
-#include "i915_gem_object.h"
-#include "i915_vma.h"
 #include "i915_gem_lmem.h"
 #include "i915_gem_mman.h"
+#include "i915_gem_object.h"
+#include "i915_vma.h"
 
 static bool gpu_write_needs_clflush(struct drm_i915_gem_object *obj)
 {
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_domain.h b/drivers/gpu/drm/i915/gem/i915_gem_domain.h
new file mode 100644
index 000000000000..9622df962bfc
--- /dev/null
+++ b/drivers/gpu/drm/i915/gem/i915_gem_domain.h
@@ -0,0 +1,15 @@ 
+/* SPDX-License-Identifier: MIT */
+/*
+ * Copyright © 2022 Intel Corporation
+ */
+
+#ifndef __I915_GEM_DOMAIN_H__
+#define __I915_GEM_DOMAIN_H__
+
+struct drm_i915_gem_object;
+enum i915_cache_level;
+
+int i915_gem_object_set_cache_level(struct drm_i915_gem_object *obj,
+				    enum i915_cache_level cache_level);
+
+#endif /* __I915_GEM_DOMAIN_H__ */
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 95899661d567..32cd07e144dc 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -1686,9 +1686,6 @@  void i915_gem_driver_release(struct drm_i915_private *dev_priv);
 
 int i915_gem_open(struct drm_i915_private *i915, struct drm_file *file);
 
-int i915_gem_object_set_cache_level(struct drm_i915_gem_object *obj,
-				    enum i915_cache_level cache_level);
-
 static inline struct i915_address_space *
 i915_gem_vm_lookup(struct drm_i915_file_private *file_priv, u32 id)
 {