Message ID | 85b4fcd249fb577b1d2acee2a6d39be7178540ff.1650435571.git.ashutosh.dixit@intel.com (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
Series | drm/i915: Media freq factor and per-gt enhancements/fixes | expand |
Hi Ashutosh, On Tue, Apr 19, 2022 at 11:25:05PM -0700, Ashutosh Dixit wrote: > From: Dale B Stimson <dale.b.stimson@intel.com> > > Add a couple of helpers to help formatting pcode commands and improve code > readability. Can you please add some more details on the helpers? > v2: Fixed commit author (Rodrigo) > > Cc: Mike Ruhl <michael.j.ruhl@intel.com> > Cc: Rodrigo Vivi <rodrigo.vivi@intel.com> > Signed-off-by: Dale B Stimson <dale.b.stimson@intel.com> > Signed-off-by: Ashutosh Dixit <ashutosh.dixit@intel.com> > Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com> [...] > +/* > + * Helpers for dGfx PCODE mailbox command formatting > + */ > +int __intel_gt_pcode_read(struct intel_gt *gt, u32 mbcmd, u32 p1, u32 p2, u32 *val); > +int __intel_gt_pcode_write(struct intel_gt *gt, u32 mbcmd, u32 p1, u32 p2, u32 val); > + > +#define __snb_pcode_read(i915, mbcmd, p1, p2, val) \ > + __intel_gt_pcode_read(&(i915)->gt0, mbcmd, p1, p2, val) > + > +#define __snb_pcode_write(i915, mbcmd, p1, p2, val) \ > + __intel_gt_pcode_write(&(i915)->gt0, mbcmd, p1, p2, val) to_gt(i915) Why do we need these defines? Looks hacky and lazy. Can't we just replace all __snb_pcode_read/write()? Andi
On Sun, 24 Apr 2022 15:00:24 -0700, Andi Shyti wrote: > > Hi Ashutosh, > > On Tue, Apr 19, 2022 at 11:25:05PM -0700, Ashutosh Dixit wrote: > > From: Dale B Stimson <dale.b.stimson@intel.com> > > > > Add a couple of helpers to help formatting pcode commands and improve code > > readability. > > Can you please add some more details on the helpers? Done in v3, please take a look. > > +/* > > + * Helpers for dGfx PCODE mailbox command formatting > > + */ > > +int __intel_gt_pcode_read(struct intel_gt *gt, u32 mbcmd, u32 p1, u32 p2, u32 *val); > > +int __intel_gt_pcode_write(struct intel_gt *gt, u32 mbcmd, u32 p1, u32 p2, u32 val); > > + > > +#define __snb_pcode_read(i915, mbcmd, p1, p2, val) \ > > + __intel_gt_pcode_read(&(i915)->gt0, mbcmd, p1, p2, val) > > + > > +#define __snb_pcode_write(i915, mbcmd, p1, p2, val) \ > > + __intel_gt_pcode_write(&(i915)->gt0, mbcmd, p1, p2, val) > > to_gt(i915) > > Why do we need these defines? Looks hacky and lazy. Can't we just > replace all __snb_pcode_read/write()? You are right, I've removed the #define's in v3. Thanks. -- Ashutosh
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index fef71b242706..0d5a4ecd374a 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h @@ -6684,6 +6684,9 @@ #define GEN6_PCODE_MAILBOX _MMIO(0x138124) #define GEN6_PCODE_READY (1 << 31) +#define GEN6_PCODE_MB_PARAM2 REG_GENMASK(23, 16) +#define GEN6_PCODE_MB_PARAM1 REG_GENMASK(15, 8) +#define GEN6_PCODE_MB_COMMAND REG_GENMASK(7, 0) #define GEN6_PCODE_ERROR_MASK 0xFF #define GEN6_PCODE_SUCCESS 0x0 #define GEN6_PCODE_ILLEGAL_CMD 0x1 diff --git a/drivers/gpu/drm/i915/intel_pcode.c b/drivers/gpu/drm/i915/intel_pcode.c index 0cff212cc81b..87b9f5035741 100644 --- a/drivers/gpu/drm/i915/intel_pcode.c +++ b/drivers/gpu/drm/i915/intel_pcode.c @@ -239,3 +239,35 @@ int intel_pcode_init(struct drm_i915_private *i915) return 0; } + +int __intel_gt_pcode_read(struct intel_gt *gt, u32 mbcmd, u32 p1, u32 p2, u32 *val) +{ + intel_wakeref_t wakeref; + u32 mbox; + int err; + + mbox = REG_FIELD_PREP(GEN6_PCODE_MB_COMMAND, mbcmd) + | REG_FIELD_PREP(GEN6_PCODE_MB_PARAM1, p1) + | REG_FIELD_PREP(GEN6_PCODE_MB_PARAM2, p2); + + with_intel_runtime_pm(gt->uncore->rpm, wakeref) + err = intel_gt_pcode_read(gt, mbox, val, NULL); + + return err; +} + +int __intel_gt_pcode_write(struct intel_gt *gt, u32 mbcmd, u32 p1, u32 p2, u32 val) +{ + intel_wakeref_t wakeref; + u32 mbox; + int err; + + mbox = REG_FIELD_PREP(GEN6_PCODE_MB_COMMAND, mbcmd) + | REG_FIELD_PREP(GEN6_PCODE_MB_PARAM1, p1) + | REG_FIELD_PREP(GEN6_PCODE_MB_PARAM2, p2); + + with_intel_runtime_pm(gt->uncore->rpm, wakeref) + err = intel_gt_pcode_write(gt, mbox, val); + + return err; +} diff --git a/drivers/gpu/drm/i915/intel_pcode.h b/drivers/gpu/drm/i915/intel_pcode.h index 96c954ec91f9..65175d82e033 100644 --- a/drivers/gpu/drm/i915/intel_pcode.h +++ b/drivers/gpu/drm/i915/intel_pcode.h @@ -36,4 +36,16 @@ int intel_gt_pcode_request(struct intel_gt *gt, u32 mbox, u32 request, int intel_pcode_init(struct drm_i915_private *i915); +/* + * Helpers for dGfx PCODE mailbox command formatting + */ +int __intel_gt_pcode_read(struct intel_gt *gt, u32 mbcmd, u32 p1, u32 p2, u32 *val); +int __intel_gt_pcode_write(struct intel_gt *gt, u32 mbcmd, u32 p1, u32 p2, u32 val); + +#define __snb_pcode_read(i915, mbcmd, p1, p2, val) \ + __intel_gt_pcode_read(&(i915)->gt0, mbcmd, p1, p2, val) + +#define __snb_pcode_write(i915, mbcmd, p1, p2, val) \ + __intel_gt_pcode_write(&(i915)->gt0, mbcmd, p1, p2, val) + #endif /* _INTEL_PCODE_H */