From patchwork Mon Apr 7 04:06:34 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: akash.goel@intel.com X-Patchwork-Id: 3944281 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 04B2B9F371 for ; Mon, 7 Apr 2014 04:07:06 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 913CE2024F for ; Mon, 7 Apr 2014 04:07:04 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by mail.kernel.org (Postfix) with ESMTP id 019482024C for ; Mon, 7 Apr 2014 04:07:02 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 796136E4B9; Sun, 6 Apr 2014 21:07:00 -0700 (PDT) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga01.intel.com (mga01.intel.com [192.55.52.88]) by gabe.freedesktop.org (Postfix) with ESMTP id 00FBE6E4B9 for ; Sun, 6 Apr 2014 21:06:59 -0700 (PDT) Received: from fmsmga002.fm.intel.com ([10.253.24.26]) by fmsmga101.fm.intel.com with ESMTP; 06 Apr 2014 21:06:36 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="4.97,807,1389772800"; d="scan'208";a="515576839" Received: from fmsmsx106.amr.corp.intel.com ([10.19.9.37]) by fmsmga002.fm.intel.com with ESMTP; 06 Apr 2014 21:06:36 -0700 Received: from fmsmsx118.amr.corp.intel.com (10.18.116.18) by FMSMSX106.amr.corp.intel.com (10.19.9.37) with Microsoft SMTP Server (TLS) id 14.3.123.3; Sun, 6 Apr 2014 21:06:36 -0700 Received: from bgsmsx152.gar.corp.intel.com (10.224.48.50) by fmsmsx118.amr.corp.intel.com (10.18.116.18) with Microsoft SMTP Server (TLS) id 14.3.123.3; Sun, 6 Apr 2014 21:06:35 -0700 Received: from bgsmsx103.gar.corp.intel.com ([169.254.4.75]) by BGSMSX152.gar.corp.intel.com ([169.254.6.21]) with mapi id 14.03.0123.003; Mon, 7 Apr 2014 09:36:35 +0530 From: "Goel, Akash" To: =?iso-8859-1?Q?Ville_Syrj=E4l=E4?= , "Daniel Vetter" Thread-Topic: [PATCH v4 3/3] drm/i915: New drm crtc property for varying the size of borders Thread-Index: AQHPSKbjsM7YWBR3TE6J55X0svxdVJsFkfhw Date: Mon, 7 Apr 2014 04:06:34 +0000 Message-ID: <8BF5CF93467D8C498F250C96583BC09CC8485F@BGSMSX103.gar.corp.intel.com> References: <1395564976-19870-1-git-send-email-akash.goel@intel.com> <1395806112-21713-1-git-send-email-akash.goel@intel.com> In-Reply-To: <1395806112-21713-1-git-send-email-akash.goel@intel.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-originating-ip: [10.223.10.10] MIME-Version: 1.0 Cc: "intel-gfx@lists.freedesktop.org" Subject: Re: [Intel-gfx] [PATCH v4 3/3] drm/i915: New drm crtc property for varying the size of borders X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Spam-Status: No, score=-4.5 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Hi Ville, Please could you review this patch. Best Regards Akash -----Original Message----- From: Goel, Akash Sent: Wednesday, March 26, 2014 9:25 AM To: intel-gfx@lists.freedesktop.org Cc: Purushothaman, Vijay A; G, Pallavi; Goel, Akash Subject: [PATCH v4 3/3] drm/i915: New drm crtc property for varying the size of borders From: Akash Goel This patch adds a new drm crtc property for varying the size of the horizontal & vertical borers of the output/display window. This will control the output of Panel fitter. v2: Added a new check for the invalid border size input v3: Fixed bugs in output window calculation Removed superfluous checks v4: Added the capability to forecfully enable the Panel fitter. The property value is of 64 bits, first 32 bits are used for border dimensions. The 33rd bit can be used to forcefully enable the panel fitter. This is useful for Panels which do not override the User specified Pipe timings. Testcase: igt/kms_panel_fitter_test Signed-off-by: Akash Goel --- drivers/gpu/drm/i915/i915_drv.h | 7 ++ drivers/gpu/drm/i915/intel_display.c | 39 +++++++- drivers/gpu/drm/i915/intel_drv.h | 5 + drivers/gpu/drm/i915/intel_panel.c | 176 ++++++++++++++++++++++++++++++++--- 4 files changed, 211 insertions(+), 16 deletions(-) +void +intel_pch_manual_panel_fitting(struct intel_crtc *intel_crtc, + struct intel_crtc_config *pipe_config) { + struct drm_display_mode *adjusted_mode; + int x, y; + u32 pf_horizontal_ratio, pf_vertical_ratio; + u32 tot_width, tot_height; + u32 src_width, src_height; /* pipesrc.x, pipesrc.y */ + u32 dst_width, dst_height; + + adjusted_mode = &pipe_config->adjusted_mode; + + src_width = pipe_config->pipe_src_w; + src_height = pipe_config->pipe_src_h; + + tot_width = adjusted_mode->hdisplay; + tot_height = adjusted_mode->vdisplay; + + /* + * Having non zero borders will reduce the size of 'HACTIVE/VACTIVE' + * region. So (HACTIVE - Left border - Right Border) * + * (VACTIVE - Top Border - Bottom border) will effectively be the + * output rectangle on screen + */ + dst_width = tot_width - + (((intel_crtc->border_size >> 16) & 0xffff) * 2); + dst_height = tot_height - + ((intel_crtc->border_size & 0xffff) * 2); + + if ((dst_width == 0) || (dst_height == 0)) { + DRM_ERROR("Invalid border size input\n"); + return; + } + + pf_horizontal_ratio = panel_fitter_scaling(src_width, dst_width); + pf_vertical_ratio = panel_fitter_scaling(src_height, dst_height); + + if (pf_horizontal_ratio > MAX_DOWNSCALE_RATIO) { + DRM_ERROR("width is too small\n"); + return; + } else if (pf_vertical_ratio > MAX_DOWNSCALE_RATIO) { + DRM_ERROR("height is too small\n"); + return; + } + + x = (adjusted_mode->hdisplay - dst_width + 1)/2; + y = (adjusted_mode->vdisplay - dst_height + 1)/2; + + pipe_config->pch_pfit.pos = (x << 16) | y; + pipe_config->pch_pfit.size = (dst_width << 16) | dst_height; + pipe_config->pch_pfit.enabled = pipe_config->pch_pfit.size != 0; } + /* adjusted_mode has been preset to be the panel's fixed mode */ void intel_pch_panel_fitting(struct intel_crtc *intel_crtc, @@ -55,6 +124,13 @@ intel_pch_panel_fitting(struct intel_crtc *intel_crtc, x = y = width = height = 0; + /* check if User wants to apply the borders, or wants to forcefully + enable the panel fitter, otherwise fall through the regular path */ + if (intel_crtc->pfit_enabled || + intel_crtc->border_size) + return intel_pch_manual_panel_fitting(intel_crtc, + pipe_config); + /* Native modes don't need fitting */ if (adjusted_mode->hdisplay == pipe_config->pipe_src_w && adjusted_mode->vdisplay == pipe_config->pipe_src_h) @@ -157,19 +233,6 @@ centre_vertically(struct drm_display_mode *mode, mode->crtc_vsync_end = mode->crtc_vsync_start + sync_width; } -static inline u32 panel_fitter_scaling(u32 source, u32 target) -{ - /* - * Floating point operation is not supported. So the FACTOR - * is defined, which can avoid the floating point computation - * when calculating the panel ratio. - */ -#define ACCURACY 12 -#define FACTOR (1 << ACCURACY) - u32 ratio = source * FACTOR / target; - return (FACTOR * ratio + FACTOR/2) / FACTOR; -} - static void i965_scale_aspect(struct intel_crtc_config *pipe_config, u32 *pfit_control) { @@ -247,6 +310,86 @@ static void i9xx_scale_aspect(struct intel_crtc_config *pipe_config, } } +void intel_gmch_manual_panel_fitting(struct intel_crtc *intel_crtc, + struct intel_crtc_config *pipe_config) { + struct drm_device *dev = intel_crtc->base.dev; + u32 pfit_control = 0, border = 0; + u32 pf_horizontal_ratio, pf_vertical_ratio; + struct drm_display_mode *adjusted_mode; + u32 tot_width, tot_height; + u32 src_width, src_height; /* pipesrc.x, pipesrc.y */ + u32 dst_width, dst_height; + + adjusted_mode = &pipe_config->adjusted_mode; + + src_width = pipe_config->pipe_src_w; + src_height = pipe_config->pipe_src_h; + + tot_width = adjusted_mode->hdisplay; + tot_height = adjusted_mode->vdisplay; + + /* + * Having non zero borders will reduce the size of 'HACTIVE/VACTIVE' + * region. So (HACTIVE - Left border - Right Border) * + * (VACTIVE - Top Border - Bottom border) will effectively be the + * output rectangle on screen + */ + dst_width = tot_width - + (((intel_crtc->border_size >> 16) & 0xffff) * 2); + dst_height = tot_height - + ((intel_crtc->border_size & 0xffff) * 2); + + if ((dst_width == 0) || (dst_height == 0)) { + DRM_ERROR("Invalid border size input\n"); + return; + } + + pf_horizontal_ratio = panel_fitter_scaling(src_width, dst_width); + pf_vertical_ratio = panel_fitter_scaling(src_height, dst_height); + + if (pf_horizontal_ratio > MAX_DOWNSCALE_RATIO) { + DRM_ERROR("width is too small\n"); + return; + } else if (pf_vertical_ratio > MAX_DOWNSCALE_RATIO) { + DRM_ERROR("height is too small\n"); + return; + } + + if (dst_width != tot_width) + centre_horizontally(adjusted_mode, dst_width); + if (dst_height != tot_height) + centre_vertically(adjusted_mode, dst_height); + + /* No scaling needed now, but still enable the panel fitter, + as that will allow the User to subequently do the dynamic + flipping of fbs of different resolutions */ + if (adjusted_mode->crtc_hdisplay == pipe_config->pipe_src_w && + adjusted_mode->crtc_vdisplay == pipe_config->pipe_src_h) { + BUG_ON(!intel_crtc->pfit_enabled); + DRM_DEBUG_KMS("Forcefully enabling the Panel fitter\n"); + } + + border = LVDS_BORDER_ENABLE; + + if (INTEL_INFO(dev)->gen >= 4) { + /* PFIT_SCALING_PROGRAMMED is de-featured on BYT */ + pfit_control |= PFIT_ENABLE | PFIT_SCALING_AUTO; + pfit_control |= ((intel_crtc->pipe << PFIT_PIPE_SHIFT) | PFIT_FILTER_FUZZY); + } else { + pfit_control |= (PFIT_ENABLE | + VERT_AUTO_SCALE | HORIZ_AUTO_SCALE | + VERT_INTERP_BILINEAR | HORIZ_INTERP_BILINEAR); + } + + /* Make sure pre-965 set dither correctly for 18bpp panels. */ + if (INTEL_INFO(dev)->gen < 4 && pipe_config->pipe_bpp == 18) + pfit_control |= PANEL_8TO6_DITHER_ENABLE; + + pipe_config->gmch_pfit.control = pfit_control; + pipe_config->gmch_pfit.lvds_border_bits = border; } + void intel_gmch_panel_fitting(struct intel_crtc *intel_crtc, struct intel_crtc_config *pipe_config, int fitting_mode) @@ -257,6 +400,13 @@ void intel_gmch_panel_fitting(struct intel_crtc *intel_crtc, adjusted_mode = &pipe_config->adjusted_mode; + /* check if User wants to apply the borders, or wants to forcefully + enable the panel fitter, otherwise fall through the regular path */ + if (intel_crtc->pfit_enabled || + intel_crtc->border_size) + return intel_gmch_manual_panel_fitting(intel_crtc, + pipe_config); + /* Native modes don't need fitting */ if (adjusted_mode->hdisplay == pipe_config->pipe_src_w && adjusted_mode->vdisplay == pipe_config->pipe_src_h) -- 1.8.5.2 diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index 6f3af15..eec32ed 100644 --- a/drivers/gpu/drm/i915/i915_drv.h +++ b/drivers/gpu/drm/i915/i915_drv.h @@ -1614,6 +1614,13 @@ typedef struct drm_i915_private { */ struct drm_property *input_size_property; + /* + * Property to dynamically vary the size of the + * borders. This will indirectly control the size + * of the display window i.e Panel fitter output + */ + struct drm_property *output_border_property; + uint32_t hw_context_size; struct list_head context_list; diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index 7149123..a217f25 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -10447,7 +10447,23 @@ static int intel_crtc_set_property(struct drm_crtc *crtc, struct drm_device *dev = crtc->dev; struct drm_i915_private *dev_priv = dev->dev_private; struct intel_crtc *intel_crtc = to_intel_crtc(crtc); - int ret = -ENOENT; + + if (property == dev_priv->output_border_property) { + if ((val == (uint64_t)intel_crtc->border_size) && + (((val >> 32) & 0x1) == intel_crtc->pfit_enabled)) + return 0; + + intel_crtc->border_size = (uint32_t)val; + intel_crtc->pfit_enabled = (val >> 32) & 0x1; + if ((intel_crtc->border_size != 0) && + (!intel_crtc->pfit_enabled)) { + DRM_ERROR("Wrong setting, expect Pfit to be enabled when " + "applying borders\n"); + return -EINVAL; + } + + goto done; + } if (property == dev_priv->input_size_property) { int new_width = (int)((val >> 16) & 0xffff); @@ -10488,7 +10504,13 @@ static int intel_crtc_set_property(struct drm_crtc *crtc, return 0; } - return ret; + return -EINVAL; + +done: + if (crtc) + intel_crtc_restore_mode(crtc); + + return 0; } static const struct drm_crtc_funcs intel_crtc_funcs = { @@ -10641,12 +10663,23 @@ static void intel_crtc_init(struct drm_device *dev, int pipe) if (!dev_priv->input_size_property) dev_priv->input_size_property = - drm_property_create_range(dev, 0, "input size", 0, 0xFFFFFFFF); + drm_property_create_range(dev, 0, "input size", + 0, 0xFFFFFFFF); if (dev_priv->input_size_property) drm_object_attach_property(&intel_crtc->base.base, dev_priv->input_size_property, 0); + + if (!dev_priv->output_border_property) + dev_priv->output_border_property = + drm_property_create_range(dev, 0, "border size", + 0, (uint64_t)0x1FFFFFFFF); + + if (dev_priv->output_border_property) + drm_object_attach_property(&intel_crtc->base.base, + dev_priv->output_border_property, + 0); } enum pipe intel_get_pipe_from_connector(struct intel_connector *connector) diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h index 5360d16..3cfc9da 100644 --- a/drivers/gpu/drm/i915/intel_drv.h +++ b/drivers/gpu/drm/i915/intel_drv.h @@ -387,6 +387,11 @@ struct intel_crtc { bool cpu_fifo_underrun_disabled; bool pch_fifo_underrun_disabled; + /* for forceful enabling of panel fitter */ + bool pfit_enabled; + /* border info for the output/display window */ + uint32_t border_size; + /* per-pipe watermark state */ struct { /* watermarks currently being used */ diff --git a/drivers/gpu/drm/i915/intel_panel.c b/drivers/gpu/drm/i915/intel_panel.c index cb05840..86a486e 100644 --- a/drivers/gpu/drm/i915/intel_panel.c +++ b/drivers/gpu/drm/i915/intel_panel.c @@ -29,10 +29,25 @@ */ #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt +/* Max Downscale ratio of 1.125, expressed in 1.12 fixed point format +*/ #define MAX_DOWNSCALE_RATIO (0x9 << 9) #include #include "intel_drv.h" +static inline u32 panel_fitter_scaling(u32 source, u32 target) { + /* + * Floating point operation is not supported. So the FACTOR + * is defined, which can avoid the floating point computation + * when calculating the panel ratio. + */ +#define ACCURACY 12 +#define FACTOR (1 << ACCURACY) + u32 ratio = source * FACTOR / target; + return (FACTOR * ratio + FACTOR/2) / FACTOR; } + void intel_fixed_panel_mode(const struct drm_display_mode *fixed_mode, struct drm_display_mode *adjusted_mode) @@ -42,6 +57,60 @@ intel_fixed_panel_mode(const struct drm_display_mode *fixed_mode, drm_mode_set_crtcinfo(adjusted_mode, 0); }