| Message ID | 9d9e663ca8e97becf04e1d4c8cb8a9a1f397a5f1.1655306128.git.mchehab@kernel.org (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | Fix TLB invalidate issues with Broadwell | expand |
On 15/06/2022 16:27, Mauro Carvalho Chehab wrote: > From: Chris Wilson <chris.p.wilson@intel.com> > > Skip all further TLB invalidations once the device is wedged and > had been reset, as, on such cases, it can no longer process instructions > on the GPU and the user no longer has access to the TLB's in each engine. > > Fixes: 7938d61591d3 ("drm/i915: Flush TLBs before releasing backing store") Are there any real problems fixed or it's just a logical thing to do? Not much harm tagging it as fixes in terms of process since it is tiny but, again, wanting a clear picture. Regards, Tvrtko > Signed-off-by: Chris Wilson <chris.p.wilson@intel.com> > Cc: Fei Yang <fei.yang@intel.com> > Cc: Andi Shyti <andi.shyti@linux.intel.com> > Cc: stable@vger.kernel.org > Acked-by: Thomas Hellström <thomas.hellstrom@linux.intel.com> > Signed-off-by: Mauro Carvalho Chehab <mchehab@kernel.org> > --- > > See [PATCH 0/6] at: https://lore.kernel.org/all/cover.1655306128.git.mchehab@kernel.org/ > > drivers/gpu/drm/i915/gt/intel_gt.c | 3 +++ > 1 file changed, 3 insertions(+) > > diff --git a/drivers/gpu/drm/i915/gt/intel_gt.c b/drivers/gpu/drm/i915/gt/intel_gt.c > index 61b7ec5118f9..fb4fd5273ca4 100644 > --- a/drivers/gpu/drm/i915/gt/intel_gt.c > +++ b/drivers/gpu/drm/i915/gt/intel_gt.c > @@ -1226,6 +1226,9 @@ void intel_gt_invalidate_tlbs(struct intel_gt *gt) > if (I915_SELFTEST_ONLY(gt->awake == -ENODEV)) > return; > > + if (intel_gt_is_wedged(gt)) > + return; > + > if (GRAPHICS_VER(i915) == 12) { > regs = gen12_regs; > num = ARRAY_SIZE(gen12_regs);
Hi Mauro, On Wed, Jun 15, 2022 at 04:27:37PM +0100, Mauro Carvalho Chehab wrote: > From: Chris Wilson <chris.p.wilson@intel.com> > > Skip all further TLB invalidations once the device is wedged and > had been reset, as, on such cases, it can no longer process instructions > on the GPU and the user no longer has access to the TLB's in each engine. > > Fixes: 7938d61591d3 ("drm/i915: Flush TLBs before releasing backing store") > > Signed-off-by: Chris Wilson <chris.p.wilson@intel.com> > Cc: Fei Yang <fei.yang@intel.com> > Cc: Andi Shyti <andi.shyti@linux.intel.com> > Cc: stable@vger.kernel.org > Acked-by: Thomas Hellström <thomas.hellstrom@linux.intel.com> > Signed-off-by: Mauro Carvalho Chehab <mchehab@kernel.org> > --- > > See [PATCH 0/6] at: https://lore.kernel.org/all/cover.1655306128.git.mchehab@kernel.org/ > > drivers/gpu/drm/i915/gt/intel_gt.c | 3 +++ > 1 file changed, 3 insertions(+) > > diff --git a/drivers/gpu/drm/i915/gt/intel_gt.c b/drivers/gpu/drm/i915/gt/intel_gt.c > index 61b7ec5118f9..fb4fd5273ca4 100644 > --- a/drivers/gpu/drm/i915/gt/intel_gt.c > +++ b/drivers/gpu/drm/i915/gt/intel_gt.c > @@ -1226,6 +1226,9 @@ void intel_gt_invalidate_tlbs(struct intel_gt *gt) > if (I915_SELFTEST_ONLY(gt->awake == -ENODEV)) > return; > > + if (intel_gt_is_wedged(gt)) > + return; > + This looks familiar :) Reviewed-by: Andi Shyti <andi.shyti@linux.intel.com> Thanks, Andi
diff --git a/drivers/gpu/drm/i915/gt/intel_gt.c b/drivers/gpu/drm/i915/gt/intel_gt.c index 61b7ec5118f9..fb4fd5273ca4 100644 --- a/drivers/gpu/drm/i915/gt/intel_gt.c +++ b/drivers/gpu/drm/i915/gt/intel_gt.c @@ -1226,6 +1226,9 @@ void intel_gt_invalidate_tlbs(struct intel_gt *gt) if (I915_SELFTEST_ONLY(gt->awake == -ENODEV)) return; + if (intel_gt_is_wedged(gt)) + return; + if (GRAPHICS_VER(i915) == 12) { regs = gen12_regs; num = ARRAY_SIZE(gen12_regs);