From patchwork Tue Mar 2 08:22:34 2010 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Daniel Vetter X-Patchwork-Id: 83143 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by demeter.kernel.org (8.14.3/8.14.3) with ESMTP id o228MWBD013081 for ; Tue, 2 Mar 2010 08:23:07 GMT Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 0C8E89F399; Tue, 2 Mar 2010 00:22:32 -0800 (PST) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mail.ffwll.ch (cable-static-49-187.intergga.ch [157.161.49.187]) by gabe.freedesktop.org (Postfix) with ESMTP id 2B8C79F396 for ; Tue, 2 Mar 2010 00:22:29 -0800 (PST) Received: by mail.ffwll.ch (Postfix, from userid 1000) id 5FC0020C433; Tue, 2 Mar 2010 09:22:28 +0100 (CET) X-Spam-ASN: X-Spam-Checker-Version: SpamAssassin 3.2.5 (2008-06-10) on orange.ffwll.ch X-Spam-Level: X-Spam-Hammy: 0.000-+--struct, 0.000-+--100644, 0.000-+--signedoffby X-Spam-Status: No, score=-4.4 required=6.0 tests=ALL_TRUSTED,BAYES_00 autolearn=ham version=3.2.5 X-Spam-Spammy: Received: from fliege.ffwll.ch (unknown [192.168.23.131]) by mail.ffwll.ch (Postfix) with ESMTP id 8932820C206; Tue, 2 Mar 2010 09:22:12 +0100 (CET) Received: from fliege.ffwll.ch (localhost.localdomain [127.0.0.1]) by fliege.ffwll.ch (8.14.3/8.14.3) with ESMTP id o228N6cK026168; Tue, 2 Mar 2010 09:23:06 +0100 Received: (from daniel@localhost) by fliege.ffwll.ch (8.14.3/8.14.3/Submit) id o228N6Sh026167; Tue, 2 Mar 2010 09:23:06 +0100 From: Daniel Vetter To: intel-gfx@lists.freedesktop.org Date: Tue, 2 Mar 2010 09:22:34 +0100 Message-Id: <9e33573053467e42d03de8ed74d1f1885b999cc3.1267517278.git.daniel.vetter@ffwll.ch> X-Mailer: git-send-email 1.6.6.1 In-Reply-To: References: In-Reply-To: References: Cc: Daniel Vetter Subject: [Intel-gfx] [PATCH 03/13] i830_memory: rip out field "offset" X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.11 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: intel-gfx-bounces@lists.freedesktop.org Errors-To: intel-gfx-bounces@lists.freedesktop.org X-Greylist: IP, sender and recipient auto-whitelisted, not delayed by milter-greylist-4.2.3 (demeter.kernel.org [140.211.167.41]); Tue, 02 Mar 2010 08:23:07 +0000 (UTC) diff --git a/src/drmmode_display.c b/src/drmmode_display.c index 52a21f5..5e2349e 100644 --- a/src/drmmode_display.c +++ b/src/drmmode_display.c @@ -1362,7 +1362,6 @@ drmmode_do_pageflip(ScreenPtr screen, dri_bo *new_front, dri_bo *old_front, scrn->fbOffset = new_front->offset; intel->front_buffer->bo = new_front; - intel->front_buffer->offset = new_front->offset; drmmode->old_fb_id = old_fb_id; return TRUE; diff --git a/src/i830.h b/src/i830.h index 9c0c1de..0924d71 100644 --- a/src/i830.h +++ b/src/i830.h @@ -179,8 +179,6 @@ typedef struct _I830OutputRec I830OutputRec, *I830OutputPtr; /** Record of a linear allocation in the aperture. */ typedef struct _i830_memory i830_memory; struct _i830_memory { - /** Offset of the allocation in card VM */ - unsigned long offset; /** * Requested size of the allocation: doesn't count padding. * diff --git a/src/i830_driver.c b/src/i830_driver.c index 2403a5a..75b3303 100644 --- a/src/i830_driver.c +++ b/src/i830_driver.c @@ -1206,7 +1206,7 @@ I830ScreenInit(int scrnIndex, ScreenPtr screen, int argc, char **argv) * set the initial framebuffer pixmap to point at * it */ - scrn->fbOffset = intel->front_buffer->offset; + scrn->fbOffset = intel->front_buffer->bo->offset; DPRINTF(PFX, "assert( if(!fbScreenInit(screen, ...) )\n"); if (!fbScreenInit(screen, NULL, diff --git a/src/i830_hwmc.c b/src/i830_hwmc.c index 3471524..184c3aa 100644 --- a/src/i830_hwmc.c +++ b/src/i830_hwmc.c @@ -151,7 +151,7 @@ Bool intel_xvmc_init_batch(ScrnInfoPtr scrn) return FALSE; if (drmAddMap(intel->drmSubFD, - (drm_handle_t) (xvmc_driver->batch->offset + + (drm_handle_t) (xvmc_driver->batch->bo->offset + intel->LinearAddr), xvmc_driver->batch->size, DRM_AGP, 0, &xvmc_driver->batch_handle) < 0) { diff --git a/src/i830_memory.c b/src/i830_memory.c index e3d7819..f1804f4 100644 --- a/src/i830_memory.c +++ b/src/i830_memory.c @@ -262,10 +262,8 @@ Bool i830_allocator_init(ScrnInfoPtr scrn, unsigned long size) return FALSE; } - start->offset = 0; start->size = 0; start->next = end; - end->offset = size; end->size = 0; end->prev = start; @@ -353,8 +351,6 @@ i830_memory *i830_allocate_memory(ScrnInfoPtr scrn, const char *name, return NULL; } - /* Give buffer obviously wrong offset/end until it's pinned. */ - mem->offset = -1; mem->size = size; mem->pitch = pitch; @@ -411,7 +407,7 @@ i830_describe_allocations(ScrnInfoPtr scrn, int verbosity, const char *prefix) xf86DrvMsgVerb(scrn->scrnIndex, X_INFO, verbosity, "%s0x%08lx: %s (%ld kB%s)%s\n", prefix, - mem->offset, mem->name, + mem->bo->offset, mem->name, mem->size / 1024, phys_suffix, tile_suffix); } xf86DrvMsgVerb(scrn->scrnIndex, X_INFO, verbosity, @@ -586,7 +582,7 @@ Bool i830_bind_all_memory(ScrnInfoPtr scrn) i830_set_gem_max_sizes(scrn); if (intel->front_buffer) - scrn->fbOffset = intel->front_buffer->offset; + scrn->fbOffset = intel->front_buffer->bo->offset; return TRUE; } @@ -615,8 +611,6 @@ Bool i830_allocate_xvmc_buffer(ScrnInfoPtr scrn, const char *name, "Failed to bind XvMC buffer bo!\n"); return FALSE; } - - (*buffer)->offset = (*buffer)->bo->offset; } return TRUE; diff --git a/src/i915_hwmc.c b/src/i915_hwmc.c index cbf3830..43b9fcc 100644 --- a/src/i915_hwmc.c +++ b/src/i915_hwmc.c @@ -212,7 +212,7 @@ static Bool i915_map_xvmc_buffers(ScrnInfoPtr scrn, intel_screen_private *intel = intel_get_screen_private(scrn); if (drmAddMap(intel->drmSubFD, - (drm_handle_t) (ctxpriv->mcStaticIndirectState->offset + + (drm_handle_t) (ctxpriv->mcStaticIndirectState->bo->offset + intel->LinearAddr), ctxpriv->mcStaticIndirectState->size, DRM_AGP, 0, (drmAddress) & ctxpriv->sis_handle) < 0) { @@ -222,7 +222,7 @@ static Bool i915_map_xvmc_buffers(ScrnInfoPtr scrn, } if (drmAddMap(intel->drmSubFD, - (drm_handle_t) (ctxpriv->mcSamplerState->offset + + (drm_handle_t) (ctxpriv->mcSamplerState->bo->offset + intel->LinearAddr), ctxpriv->mcSamplerState->size, DRM_AGP, 0, (drmAddress) & ctxpriv->ssb_handle) < 0) { @@ -232,7 +232,7 @@ static Bool i915_map_xvmc_buffers(ScrnInfoPtr scrn, } if (drmAddMap(intel->drmSubFD, - (drm_handle_t) (ctxpriv->mcMapState->offset + + (drm_handle_t) (ctxpriv->mcMapState->bo->offset + intel->LinearAddr), ctxpriv->mcMapState->size, DRM_AGP, 0, (drmAddress) & ctxpriv->msb_handle) < 0) { @@ -242,7 +242,7 @@ static Bool i915_map_xvmc_buffers(ScrnInfoPtr scrn, } if (drmAddMap(intel->drmSubFD, - (drm_handle_t) (ctxpriv->mcPixelShaderProgram->offset + + (drm_handle_t) (ctxpriv->mcPixelShaderProgram->bo->offset + intel->LinearAddr), ctxpriv->mcPixelShaderProgram->size, DRM_AGP, 0, (drmAddress) & ctxpriv->psp_handle) < 0) { @@ -252,7 +252,7 @@ static Bool i915_map_xvmc_buffers(ScrnInfoPtr scrn, } if (drmAddMap(intel->drmSubFD, - (drm_handle_t) (ctxpriv->mcPixelShaderConstants->offset + + (drm_handle_t) (ctxpriv->mcPixelShaderConstants->bo->offset + intel->LinearAddr), ctxpriv->mcPixelShaderConstants->size, DRM_AGP, 0, (drmAddress) & ctxpriv->psc_handle) < 0) { @@ -262,7 +262,7 @@ static Bool i915_map_xvmc_buffers(ScrnInfoPtr scrn, } if (drmAddMap(intel->drmSubFD, - (drm_handle_t) (ctxpriv->mcCorrdata->offset + + (drm_handle_t) (ctxpriv->mcCorrdata->bo->offset + intel->LinearAddr), ctxpriv->mcCorrdata->size, DRM_AGP, 0, (drmAddress) & ctxpriv->corrdata_handle) < 0) { @@ -488,29 +488,29 @@ static int i915_xvmc_create_context(ScrnInfoPtr scrn, XvMCContextPtr pContext, /* common context items */ contextRec->comm.type = xvmc_driver->flag; - contextRec->comm.batchbuffer.offset = xvmc_driver->batch->offset; + contextRec->comm.batchbuffer.offset = xvmc_driver->batch->bo->offset; contextRec->comm.batchbuffer.size = xvmc_driver->batch->size; contextRec->comm.batchbuffer.handle = xvmc_driver->batch_handle; /* i915 private context */ contextRec->ctxno = i; contextRec->sis.handle = ctxpriv->sis_handle; - contextRec->sis.offset = ctxpriv->mcStaticIndirectState->offset; + contextRec->sis.offset = ctxpriv->mcStaticIndirectState->bo->offset; contextRec->sis.size = ctxpriv->mcStaticIndirectState->size; contextRec->ssb.handle = ctxpriv->ssb_handle; - contextRec->ssb.offset = ctxpriv->mcSamplerState->offset; + contextRec->ssb.offset = ctxpriv->mcSamplerState->bo->offset; contextRec->ssb.size = ctxpriv->mcSamplerState->size; contextRec->msb.handle = ctxpriv->msb_handle; - contextRec->msb.offset = ctxpriv->mcMapState->offset; + contextRec->msb.offset = ctxpriv->mcMapState->bo->offset; contextRec->msb.size = ctxpriv->mcMapState->size; contextRec->psp.handle = ctxpriv->psp_handle; - contextRec->psp.offset = ctxpriv->mcPixelShaderProgram->offset; + contextRec->psp.offset = ctxpriv->mcPixelShaderProgram->bo->offset; contextRec->psp.size = ctxpriv->mcPixelShaderProgram->size; contextRec->psc.handle = ctxpriv->psc_handle; - contextRec->psc.offset = ctxpriv->mcPixelShaderConstants->offset; + contextRec->psc.offset = ctxpriv->mcPixelShaderConstants->bo->offset; contextRec->psc.size = ctxpriv->mcPixelShaderConstants->size; contextRec->corrdata.handle = ctxpriv->corrdata_handle; - contextRec->corrdata.offset = ctxpriv->mcCorrdata->offset; + contextRec->corrdata.offset = ctxpriv->mcCorrdata->bo->offset; contextRec->corrdata.size = ctxpriv->mcCorrdata->size; contextRec->deviceID = DEVICE_ID(intel->PciInfo); @@ -608,7 +608,7 @@ static int i915_xvmc_create_surface(ScrnInfoPtr scrn, XvMCSurfacePtr pSurf, i830_describe_allocations(scrn, 1, ""); if (drmAddMap(intel->drmSubFD, - (drm_handle_t) (sfpriv->surface->offset + + (drm_handle_t) (sfpriv->surface->bo->offset + intel->LinearAddr), sfpriv->surface->size, DRM_AGP, 0, (drmAddress) & sfpriv->surface_handle) < 0) { xf86DrvMsg(scrn->scrnIndex, X_ERROR, @@ -623,7 +623,7 @@ static int i915_xvmc_create_surface(ScrnInfoPtr scrn, XvMCSurfacePtr pSurf, surfaceRec->srfno = srfno; surfaceRec->srf.handle = sfpriv->surface_handle; - surfaceRec->srf.offset = sfpriv->surface->offset; + surfaceRec->srf.offset = sfpriv->surface->bo->offset; surfaceRec->srf.size = sfpriv->surface->size; pXvMC->surfaces[srfno] = pSurf->surface_id; @@ -697,7 +697,7 @@ static int i915_xvmc_create_subpict(ScrnInfoPtr scrn, XvMCSubpicturePtr pSubp, } if (drmAddMap(intel->drmSubFD, - (drm_handle_t) (sfpriv->surface->offset + + (drm_handle_t) (sfpriv->surface->bo->offset + intel->LinearAddr), sfpriv->surface->size, DRM_AGP, 0, (drmAddress) & sfpriv->surface_handle) < 0) { xf86DrvMsg(scrn->scrnIndex, X_ERROR, @@ -712,7 +712,7 @@ static int i915_xvmc_create_subpict(ScrnInfoPtr scrn, XvMCSubpicturePtr pSubp, surfaceRec->srfno = srfno; surfaceRec->srf.handle = sfpriv->surface_handle; - surfaceRec->srf.offset = sfpriv->surface->offset; + surfaceRec->srf.offset = sfpriv->surface->bo->offset; surfaceRec->srf.size = sfpriv->surface->size; pXvMC->sfprivs[srfno] = sfpriv; @@ -816,7 +816,7 @@ static int i915_xvmc_put_image(ScrnInfoPtr scrn, /* use char *buf to hold our surface offset...hacky! */ buf = (unsigned char *)pXvMC->sfprivs[xvmc_cmd->srfNo]-> - surface->offset; + surface->bo->offset; break; default: return 0;