From patchwork Wed Dec 16 00:23:53 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Kumar, Abhay" X-Patchwork-Id: 7858231 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id CE4EBBEEE1 for ; Wed, 16 Dec 2015 00:24:16 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id F3522203C0 for ; Wed, 16 Dec 2015 00:24:15 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by mail.kernel.org (Postfix) with ESMTP id 06CDF2037F for ; Wed, 16 Dec 2015 00:24:15 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 875506E809; Tue, 15 Dec 2015 16:24:14 -0800 (PST) X-Original-To: Intel-gfx@lists.freedesktop.org Delivered-To: Intel-gfx@lists.freedesktop.org Received: from mga09.intel.com (mga09.intel.com [134.134.136.24]) by gabe.freedesktop.org (Postfix) with ESMTP id 2D9826E808 for ; Tue, 15 Dec 2015 16:24:13 -0800 (PST) Received: from fmsmga004.fm.intel.com ([10.253.24.48]) by orsmga102.jf.intel.com with ESMTP; 15 Dec 2015 16:23:54 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.20,434,1444719600"; d="scan'208";a="13883912" Received: from orsmsx102.amr.corp.intel.com ([10.22.225.129]) by fmsmga004.fm.intel.com with ESMTP; 15 Dec 2015 16:23:54 -0800 Received: from orsmsx157.amr.corp.intel.com (10.22.240.23) by ORSMSX102.amr.corp.intel.com (10.22.225.129) with Microsoft SMTP Server (TLS) id 14.3.248.2; Tue, 15 Dec 2015 16:23:54 -0800 Received: from orsmsx114.amr.corp.intel.com ([169.254.8.92]) by ORSMSX157.amr.corp.intel.com ([169.254.9.113]) with mapi id 14.03.0248.002; Tue, 15 Dec 2015 16:23:53 -0800 From: "Kumar, Abhay" To: "Intel-gfx@lists.freedesktop.org" , "Syrjala, Ville" , Paulo Zanoni Thread-Topic: [PATCH] drm/i915: edp resume/On time optimization. Thread-Index: AQHRN4ZdKVu50hjy3EyQjGKlZOlqip7Mv7Iw Date: Wed, 16 Dec 2015 00:23:53 +0000 Message-ID: References: <1450217798-24292-1-git-send-email-abhay.kumar@intel.com> In-Reply-To: <1450217798-24292-1-git-send-email-abhay.kumar@intel.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-originating-ip: [10.22.254.138] MIME-Version: 1.0 Subject: Re: [Intel-gfx] [PATCH] drm/i915: edp resume/On time optimization. X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Is this something close to what we wanted to optimize for edp resume time and using wall clock. -----Original Message----- From: Kumar, Abhay Sent: Tuesday, December 15, 2015 2:17 PM To: Intel-gfx@lists.freedesktop.org Cc: Kumar, Abhay Subject: [PATCH] drm/i915: edp resume/On time optimization. From: Abhay Kumar Make resume codepath not to wait for panel_power_cycle_delay(t11_t12) if this time is already spent in suspend/poweron time. Signed-off-by: Abhay Kumar --- drivers/gpu/drm/i915/intel_ddi.c | 3 +++ drivers/gpu/drm/i915/intel_dp.c | 18 ++++++++++++++++++ drivers/gpu/drm/i915/intel_drv.h | 2 ++ 3 files changed, 23 insertions(+) -- 1.9.1 diff --git a/drivers/gpu/drm/i915/intel_ddi.c b/drivers/gpu/drm/i915/intel_ddi.c index f00a3c9..d2a5a89 100644 --- a/drivers/gpu/drm/i915/intel_ddi.c +++ b/drivers/gpu/drm/i915/intel_ddi.c @@ -2395,6 +2395,9 @@ static void intel_ddi_post_disable(struct intel_encoder *intel_encoder) intel_dp_sink_dpms(intel_dp, DRM_MODE_DPMS_OFF); intel_edp_panel_vdd_on(intel_dp); intel_edp_panel_off(intel_dp); + + /* storing panel power off time */ + do_gettimeofday(&intel_dp->panel_power_off_timestamp); } if (IS_SKYLAKE(dev) || IS_KABYLAKE(dev)) diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c index 0f1eb96..1ca01b1 100644 --- a/drivers/gpu/drm/i915/intel_dp.c +++ b/drivers/gpu/drm/i915/intel_dp.c @@ -2032,6 +2032,9 @@ static void edp_panel_on(struct intel_dp *intel_dp) struct drm_i915_private *dev_priv = dev->dev_private; u32 pp; i915_reg_t pp_ctrl_reg; + u32 panel_power_off_duration; + u32 temp_power_cycle_delay; + lockdep_assert_held(&dev_priv->pps_mutex); @@ -2045,8 +2048,22 @@ static void edp_panel_on(struct intel_dp *intel_dp) "eDP port %c panel power already on\n", port_name(dp_to_dig_port(intel_dp)->port))) return; + /* taking the diffrence of currrent time and panel power off time + and then make panel to wait for T12 if needed */ + do_gettimeofday(&intel_dp->panel_power_on_timestamp); + + panel_power_off_duration = (intel_dp->panel_power_on_timestamp.tv_sec-intel_dp->panel_power_off_timestamp.tv_sec) * 1000000 + intel_dp->panel_power_on_timestamp.tv_usec-intel_dp->panel_power_off_timestamp.tv_usec; + panel_power_off_duration = panel_power_off_duration / 1000 ; + temp_power_cycle_delay = intel_dp->panel_power_cycle_delay; + + if(panel_power_off_duration >= intel_dp->panel_power_cycle_delay) { + intel_dp->panel_power_cycle_delay = 0; + } else { + intel_dp->panel_power_cycle_delay = intel_dp->panel_power_cycle_delay - panel_power_off_duration; + } wait_panel_power_cycle(intel_dp); + intel_dp->panel_power_cycle_delay = temp_power_cycle_delay; pp_ctrl_reg = _pp_ctrl_reg(intel_dp); pp = ironlake_get_pp_control(intel_dp); @@ -5127,6 +5144,7 @@ static void intel_dp_init_panel_power_timestamps(struct intel_dp *intel_dp) intel_dp->last_power_cycle = jiffies; intel_dp->last_power_on = jiffies; intel_dp->last_backlight_off = jiffies; + do_gettimeofday(&intel_dp->panel_power_off_timestamp); } static void diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h index 76dfa28..66ed2cb 100644 --- a/drivers/gpu/drm/i915/intel_drv.h +++ b/drivers/gpu/drm/i915/intel_drv.h @@ -769,6 +769,8 @@ struct intel_dp { unsigned long last_power_cycle; unsigned long last_power_on; unsigned long last_backlight_off; + struct timeval panel_power_off_timestamp; + struct timeval panel_power_on_timestamp; struct notifier_block edp_notifier;