From patchwork Mon Feb 14 15:44:51 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Diego Celix X-Patchwork-Id: 556071 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by demeter1.kernel.org (8.14.4/8.14.3) with ESMTP id p1EFjFVW018482 for ; Mon, 14 Feb 2011 15:45:39 GMT Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id F05719E9CC for ; Mon, 14 Feb 2011 07:45:14 -0800 (PST) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mail-ey0-f177.google.com (mail-ey0-f177.google.com [209.85.215.177]) by gabe.freedesktop.org (Postfix) with ESMTP id 9CCD99E772 for ; Mon, 14 Feb 2011 07:44:52 -0800 (PST) Received: by eyd9 with SMTP id 9so2134122eyd.36 for ; Mon, 14 Feb 2011 07:44:51 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=domainkey-signature:mime-version:date:message-id:subject:from:to :content-type; bh=lr+f3qnoeP9XGVbyb3COr72aM5QyHNtEDO9VMRV+RD8=; b=ZV0Y2+s0BVdm8OsHB4U9BHKDW3JO9BQnqLlH2ubbwv4FU02pPVz8Wn9f2Dq7zF8+3A uWX1Ddzly8fTmFV7o+z9QsNjuiWld3sQ8Kex7mN89Pn2UbYaG5kYdmxy+1svOExL1Cs2 3iIP4uwEV/YKJErUqTkDn13WevwQowtOd4GfI= DomainKey-Signature: a=rsa-sha1; c=nofws; d=gmail.com; s=gamma; h=mime-version:date:message-id:subject:from:to:content-type; b=Sjexv81k0DxjAexqy4babOhfBe+U3VB/HyfhHN0FtfbM7wHTyqaer2K1fHcEKCg32E tPvHLnsTZyJ/kRrQQHUxi6+gfJsnNJLT5C4kqA/5Qxw3IBLz4RUfE1RRPQmFQ/QN938u 5SuN/oiHs4QC6DxfWlsNo9/mgQDeEkpVB0PEc= MIME-Version: 1.0 Received: by 10.213.29.77 with SMTP id p13mr4185742ebc.2.1297698291374; Mon, 14 Feb 2011 07:44:51 -0800 (PST) Received: by 10.213.25.145 with HTTP; Mon, 14 Feb 2011 07:44:51 -0800 (PST) Date: Mon, 14 Feb 2011 15:44:51 +0000 Message-ID: From: Diego Celix To: intel-gfx Subject: [Intel-gfx] [intel-gpu-tools][PATCH] Correct identification of the GEN5 chips on the IS_9XX() define X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.11 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: intel-gfx-bounces+patchwork-intel-gfx=patchwork.kernel.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+patchwork-intel-gfx=patchwork.kernel.org@lists.freedesktop.org X-Greylist: IP, sender and recipient auto-whitelisted, not delayed by milter-greylist-4.2.6 (demeter1.kernel.org [140.211.167.41]); Mon, 14 Feb 2011 15:45:39 +0000 (UTC) From 62d5a29c9484e989a41f591a403bf9e6c5a8f81e Mon Sep 17 00:00:00 2001 From: Diego Celix Date: Mon, 14 Feb 2011 15:21:53 +0000 Subject: [PATCH] lib/intel_chipset: GEN5 fix This fixes the correct identification of the GEN5 chipsets inside the IS_9XX() #define. Fixes the following error: Couldn't map MMIO region: No such file or directory Provided on each call of the intel_get_mmio function. --- lib/intel_chipset.h | 2 +- 1 files changed, 1 insertions(+), 1 deletions(-) diff --git a/lib/intel_chipset.h b/lib/intel_chipset.h index 48c441d..754bdd3 100755 --- a/lib/intel_chipset.h +++ b/lib/intel_chipset.h @@ -141,7 +141,7 @@ #define IS_9XX(devid) (IS_GEN3(devid) || \ IS_GEN4(devid) || \ - IS_GEN4(devid) || \ + IS_GEN5(devid) || \ IS_GEN6(devid)) #define IS_INTEL(devid) (IS_GEN2(devid) || \ -- 1.7.3.4