From patchwork Tue Sep 12 06:08:23 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Wang, Zhi A" X-Patchwork-Id: 9948449 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id BE48C6024A for ; Tue, 12 Sep 2017 06:09:11 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id AF7AA28E61 for ; Tue, 12 Sep 2017 06:09:11 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id A410428E67; Tue, 12 Sep 2017 06:09:11 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.2 required=2.0 tests=BAYES_00, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 15F4328E66 for ; Tue, 12 Sep 2017 06:09:10 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 60BAF6E1FD; Tue, 12 Sep 2017 06:08:28 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga07.intel.com (mga07.intel.com [134.134.136.100]) by gabe.freedesktop.org (Postfix) with ESMTPS id 4FDA56E1FD for ; Tue, 12 Sep 2017 06:08:27 +0000 (UTC) Received: from orsmga004.jf.intel.com ([10.7.209.38]) by orsmga105.jf.intel.com with ESMTP; 11 Sep 2017 23:08:26 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.42,382,1500966000"; d="scan'208";a="127854089" Received: from fmsmsx104.amr.corp.intel.com ([10.18.124.202]) by orsmga004.jf.intel.com with ESMTP; 11 Sep 2017 23:08:26 -0700 Received: from fmsmsx114.amr.corp.intel.com (10.18.116.8) by fmsmsx104.amr.corp.intel.com (10.18.124.202) with Microsoft SMTP Server (TLS) id 14.3.319.2; Mon, 11 Sep 2017 23:08:26 -0700 Received: from shsmsx102.ccr.corp.intel.com (10.239.4.154) by FMSMSX114.amr.corp.intel.com (10.18.116.8) with Microsoft SMTP Server (TLS) id 14.3.319.2; Mon, 11 Sep 2017 23:08:25 -0700 Received: from shsmsx104.ccr.corp.intel.com ([169.254.5.117]) by shsmsx102.ccr.corp.intel.com ([169.254.2.39]) with mapi id 14.03.0319.002; Tue, 12 Sep 2017 14:08:23 +0800 From: "Wang, Zhi A" To: "intel-gfx@lists.freedesktop.org" Thread-Topic: [PATCH v2 9/9] drm/i915/gvt: Do not allocate initial ring scan buffer Thread-Index: AQHTK4mWEgx0tSKTD0qlpW3tAg3366Kww9bw Date: Tue, 12 Sep 2017 06:08:23 +0000 Message-ID: References: <1505194774-21243-1-git-send-email-zhi.a.wang@intel.com> <1505194774-21243-9-git-send-email-zhi.a.wang@intel.com> In-Reply-To: <1505194774-21243-9-git-send-email-zhi.a.wang@intel.com> Accept-Language: zh-CN, en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: dlp-product: dlpe-windows dlp-version: 11.0.0.116 dlp-reaction: no-action x-originating-ip: [10.239.127.40] MIME-Version: 1.0 Subject: Re: [Intel-gfx] [PATCH v2 9/9] drm/i915/gvt: Do not allocate initial ring scan buffer X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Virus-Scanned: ClamAV using ClamSMTP Ah... sorry. This patchset shouldn't be here. -----Original Message----- From: Wang, Zhi A Sent: Tuesday, September 12, 2017 8:40 AM To: intel-gfx@lists.freedesktop.org Cc: Wang, Zhi A Subject: [PATCH v2 9/9] drm/i915/gvt: Do not allocate initial ring scan buffer Theoretically, the largest bulk of commands in the ring buffer of an engine might be the first submission, which usually contains a lot of commands to initialize the HW. After removing the initial allocation of the ring scan buffer and let krealloc() do everything we need, we still have a big chance to get the buffer of suitable size in the first submission. Tested on my SKL NUC. Signed-off-by: Zhi Wang --- drivers/gpu/drm/i915/gvt/execlist.c | 21 --------------------- drivers/gpu/drm/i915/gvt/gvt.h | 1 - 2 files changed, 22 deletions(-) -- 2.7.4 diff --git a/drivers/gpu/drm/i915/gvt/execlist.c b/drivers/gpu/drm/i915/gvt/execlist.c index fae7459..86d3cc8 100644 --- a/drivers/gpu/drm/i915/gvt/execlist.c +++ b/drivers/gpu/drm/i915/gvt/execlist.c @@ -873,36 +873,15 @@ void intel_vgpu_clean_execlist(struct intel_vgpu *vgpu) } } -#define RESERVE_RING_BUFFER_SIZE ((1 * PAGE_SIZE)/8) int intel_vgpu_init_execlist(struct intel_vgpu *vgpu) { - struct intel_vgpu_submission *s = &vgpu->submission; enum intel_engine_id i; struct intel_engine_cs *engine; for_each_engine(engine, vgpu->gvt->dev_priv, i) init_vgpu_execlist(vgpu, i); - /* each ring has a shadow ring buffer until vgpu destroyed */ - for_each_engine(engine, vgpu->gvt->dev_priv, i) { - s->ring_scan_buffer[i] = - kmalloc(RESERVE_RING_BUFFER_SIZE, GFP_KERNEL); - if (!s->ring_scan_buffer[i]) { - gvt_vgpu_err("fail to alloc ring scan buffer\n"); - goto out; - } - s->ring_scan_buffer_size[i] = RESERVE_RING_BUFFER_SIZE; - } return 0; -out: - for_each_engine(engine, vgpu->gvt->dev_priv, i) { - if (s->ring_scan_buffer_size[i]) { - kfree(s->ring_scan_buffer[i]); - s->ring_scan_buffer[i] = NULL; - s->ring_scan_buffer_size[i] = 0; - } - } - return -ENOMEM; } void intel_vgpu_reset_execlist(struct intel_vgpu *vgpu, diff --git a/drivers/gpu/drm/i915/gvt/gvt.h b/drivers/gpu/drm/i915/gvt/gvt.h index 49fe548..7a770b1 100644 --- a/drivers/gpu/drm/i915/gvt/gvt.h +++ b/drivers/gpu/drm/i915/gvt/gvt.h @@ -150,7 +150,6 @@ struct intel_vgpu_submission { struct i915_gem_context *shadow_ctx; DECLARE_BITMAP(shadow_ctx_desc_updated, I915_NUM_ENGINES); DECLARE_BITMAP(tlb_handle_pending, I915_NUM_ENGINES); - /* 1/2K for each engine */ void *ring_scan_buffer[I915_NUM_ENGINES]; int ring_scan_buffer_size[I915_NUM_ENGINES]; };