From patchwork Fri Mar 25 12:25:26 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Jani Nikula X-Patchwork-Id: 12791564 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id D6573C433FE for ; Fri, 25 Mar 2022 12:26:09 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 3C79810E5F3; Fri, 25 Mar 2022 12:26:09 +0000 (UTC) Received: from mga11.intel.com (mga11.intel.com [192.55.52.93]) by gabe.freedesktop.org (Postfix) with ESMTPS id F08C810E5A4; Fri, 25 Mar 2022 12:26:04 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1648211164; x=1679747164; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=bTuISRUOz42f6W6vKjN6r3Nh5xsf4gWS+y1HtBiVPzc=; b=H/n4MESYMkCujE3zupMD3fOL+d5rpQsKhOv8anequtHuaI3ZCXcS1w5a jLxWnAangPvAO97m7L3B6PyqPZVrmn+j/1R8Z7iDoZgSR614Q6d2hFjFB ZGl4BbPlrw1sR+mS8/7rU1/fvt5DcfXz6oOb7JytCmBhgaFLtbc9jbhXo UxbvN9sznM+/JME3SMLB7Y0j677wozZsSnAzYgdZxBiMKiB36/CGvGJ4V 1MC9Zz9B3QftSSbFPoAN1kFQXTQUHh7PMIEkXwFME8sQLExyZFSpncrIu h75drpkEqcealOmjyzCog7TyFMOniWbFSGAqICuKt+doN8jqvuEMq/nLs g==; X-IronPort-AV: E=McAfee;i="6200,9189,10296"; a="256189092" X-IronPort-AV: E=Sophos;i="5.90,209,1643702400"; d="scan'208";a="256189092" Received: from orsmga003.jf.intel.com ([10.7.209.27]) by fmsmga102.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 25 Mar 2022 05:25:58 -0700 X-IronPort-AV: E=Sophos;i="5.90,209,1643702400"; d="scan'208";a="501767384" Received: from avgorshk-mobl.ccr.corp.intel.com (HELO localhost) ([10.252.35.183]) by orsmga003-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 25 Mar 2022 05:25:56 -0700 From: Jani Nikula To: dri-devel@lists.freedesktop.org Date: Fri, 25 Mar 2022 14:25:26 +0200 Message-Id: X-Mailer: git-send-email 2.30.2 In-Reply-To: References: MIME-Version: 1.0 Organization: Intel Finland Oy - BIC 0357606-4 - Westendinkatu 7, 02160 Espoo Subject: [Intel-gfx] [PATCH 4/9] drm/edid: use struct detailed_timing member access in gtf2 functions X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: jani.nikula@intel.com, intel-gfx@lists.freedesktop.org Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Use struct detailed_timing member access instead of direct offsets to avoid casting. Use BUILD_BUG_ON() for sanity check. Cc: Ville Syrjälä Signed-off-by: Jani Nikula --- drivers/gpu/drm/drm_edid.c | 57 +++++++++++++++++++++++++------------- 1 file changed, 37 insertions(+), 20 deletions(-) diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c index 5396fa78e864..a9df75cdcc5b 100644 --- a/drivers/gpu/drm/drm_edid.c +++ b/drivers/gpu/drm/drm_edid.c @@ -2433,61 +2433,78 @@ drm_monitor_supports_rb(struct edid *edid) } static void -find_gtf2(struct detailed_timing *t, void *data) +find_gtf2(struct detailed_timing *timing, void *data) { - u8 *r = (u8 *)t; + struct detailed_timing **res = data; - if (!is_display_descriptor(t, EDID_DETAIL_MONITOR_RANGE)) + if (!is_display_descriptor(timing, EDID_DETAIL_MONITOR_RANGE)) return; - if (r[10] == 0x02) - *(u8 **)data = r; + BUILD_BUG_ON(offsetof(typeof(*timing), data.other_data.data.range.flags) != 10); + + if (timing->data.other_data.data.range.flags == 0x02) + *res = timing; } /* Secondary GTF curve kicks in above some break frequency */ static int drm_gtf2_hbreak(struct edid *edid) { - u8 *r = NULL; + struct detailed_timing *timing = NULL; + + drm_for_each_detailed_block((u8 *)edid, find_gtf2, &timing); - drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r); - return r ? (r[12] * 2) : 0; + BUILD_BUG_ON(offsetof(typeof(*timing), data.other_data.data.range.formula.gtf2.hfreq_start_khz) != 12); + + return timing ? timing->data.other_data.data.range.formula.gtf2.hfreq_start_khz * 2 : 0; } static int drm_gtf2_2c(struct edid *edid) { - u8 *r = NULL; + struct detailed_timing *timing = NULL; + + drm_for_each_detailed_block((u8 *)edid, find_gtf2, &timing); + + BUILD_BUG_ON(offsetof(typeof(*timing), data.other_data.data.range.formula.gtf2.c) != 13); - drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r); - return r ? r[13] : 0; + return timing ? timing->data.other_data.data.range.formula.gtf2.c : 0; } static int drm_gtf2_m(struct edid *edid) { - u8 *r = NULL; + struct detailed_timing *timing = NULL; - drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r); - return r ? (r[15] << 8) + r[14] : 0; + drm_for_each_detailed_block((u8 *)edid, find_gtf2, &timing); + + BUILD_BUG_ON(offsetof(typeof(*timing), data.other_data.data.range.formula.gtf2.m) != 14); + + return timing ? le16_to_cpu(timing->data.other_data.data.range.formula.gtf2.m) : 0; } static int drm_gtf2_k(struct edid *edid) { - u8 *r = NULL; + struct detailed_timing *timing = NULL; + + drm_for_each_detailed_block((u8 *)edid, find_gtf2, &timing); - drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r); - return r ? r[16] : 0; + BUILD_BUG_ON(offsetof(typeof(*timing), data.other_data.data.range.formula.gtf2.k) != 16); + + return timing ? timing->data.other_data.data.range.formula.gtf2.k : 0; } static int drm_gtf2_2j(struct edid *edid) { - u8 *r = NULL; + struct detailed_timing *timing = NULL; + + drm_for_each_detailed_block((u8 *)edid, find_gtf2, &timing); + + BUILD_BUG_ON(offsetof(typeof(*timing), data.other_data.data.range.formula.gtf2.j) != 17); - drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r); - return r ? r[17] : 0; + return timing ? timing->data.other_data.data.range.formula.gtf2.j : 0; } /**