From patchwork Wed Jan 22 13:45:09 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jani Nikula X-Patchwork-Id: 11345749 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id EAB38139A for ; Wed, 22 Jan 2020 13:45:45 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id D35382465B for ; Wed, 22 Jan 2020 13:45:45 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org D35382465B Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=intel.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=intel-gfx-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 3E4616F510; Wed, 22 Jan 2020 13:45:45 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga12.intel.com (mga12.intel.com [192.55.52.136]) by gabe.freedesktop.org (Postfix) with ESMTPS id E48446F510; Wed, 22 Jan 2020 13:45:42 +0000 (UTC) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga004.jf.intel.com ([10.7.209.38]) by fmsmga106.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 22 Jan 2020 05:45:42 -0800 X-IronPort-AV: E=Sophos;i="5.70,350,1574150400"; d="scan'208";a="374926136" Received: from jnikula-mobl3.fi.intel.com (HELO localhost) ([10.237.66.161]) by orsmga004-auth.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 22 Jan 2020 05:45:39 -0800 From: Jani Nikula To: dri-devel@lists.freedesktop.org Date: Wed, 22 Jan 2020 15:45:09 +0200 Message-Id: X-Mailer: git-send-email 2.20.1 In-Reply-To: References: MIME-Version: 1.0 Organization: Intel Finland Oy - BIC 0357606-4 - Westendinkatu 7, 02160 Espoo Subject: [Intel-gfx] [PATCH 3/7] drm/amd/display: use drm_dsc_dp_rc_buffer_size() to get rc buffer size X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: jani.nikula@intel.com, intel-gfx@lists.freedesktop.org, Alex Deucher , Harry Wentland Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Use the new drm_dsc_dp_rc_buffer_size() helper to simplify rc buffer size computation. No functional changes. Cc: Alex Deucher Cc: Harry Wentland Cc: Manasi Navare Signed-off-by: Jani Nikula --- drivers/gpu/drm/amd/display/dc/dsc/dc_dsc.c | 37 ++++----------------- 1 file changed, 7 insertions(+), 30 deletions(-) diff --git a/drivers/gpu/drm/amd/display/dc/dsc/dc_dsc.c b/drivers/gpu/drm/amd/display/dc/dsc/dc_dsc.c index 8b78fcbfe746..6dcfe049e5b8 100644 --- a/drivers/gpu/drm/amd/display/dc/dsc/dc_dsc.c +++ b/drivers/gpu/drm/amd/display/dc/dsc/dc_dsc.c @@ -85,31 +85,6 @@ static uint32_t dc_dsc_bandwidth_in_kbps_from_timing( } -static bool dsc_buff_block_size_from_dpcd(int dpcd_buff_block_size, int *buff_block_size) -{ - - switch (dpcd_buff_block_size) { - case DP_DSC_RC_BUF_BLK_SIZE_1: - *buff_block_size = 1024; - break; - case DP_DSC_RC_BUF_BLK_SIZE_4: - *buff_block_size = 4 * 1024; - break; - case DP_DSC_RC_BUF_BLK_SIZE_16: - *buff_block_size = 16 * 1024; - break; - case DP_DSC_RC_BUF_BLK_SIZE_64: - *buff_block_size = 64 * 1024; - break; - default: { - dm_error("%s: DPCD DSC buffer size not recognized.\n", __func__); - return false; - } - } - - return true; -} - static bool dsc_line_buff_depth_from_dpcd(int dpcd_line_buff_bit_depth, int *line_buff_bit_depth) { @@ -772,14 +747,16 @@ bool dc_dsc_parse_dsc_dpcd(const struct dc *dc, const uint8_t *dpcd_dsc_basic_da dsc_sink_caps->dsc_version = dpcd_dsc_basic_data[DP_DSC_REV - DP_DSC_SUPPORT]; { - int buff_block_size; - int buff_size; + u8 buff_block_size = dpcd_dsc_basic_data[DP_DSC_RC_BUF_BLK_SIZE - DP_DSC_SUPPORT]; + u8 buff_size = dpcd_dsc_basic_data[DP_DSC_RC_BUF_SIZE - DP_DSC_SUPPORT]; + int size = drm_dsc_dp_rc_buffer_size(buff_block_size, buff_size); - if (!dsc_buff_block_size_from_dpcd(dpcd_dsc_basic_data[DP_DSC_RC_BUF_BLK_SIZE - DP_DSC_SUPPORT], &buff_block_size)) + if (!size) { + dm_error("%s: DPCD DSC buffer size not recognized.\n", __func__); return false; + } - buff_size = dpcd_dsc_basic_data[DP_DSC_RC_BUF_SIZE - DP_DSC_SUPPORT] + 1; - dsc_sink_caps->rc_buffer_size = buff_size * buff_block_size; + dsc_sink_caps->rc_buffer_size = size; } dsc_sink_caps->slice_caps1.raw = dpcd_dsc_basic_data[DP_DSC_SLICE_CAP_1 - DP_DSC_SUPPORT];