| Message ID | b1501360-d35f-a931-7b69-9dfd0170f207@linux.intel.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
On Tue, Nov 22, 2016 at 01:38:51PM +0100, Maarten Lankhorst wrote: > We can now obtain the relevant crtc_state/conn_state from the > relevant callbacks, which means all the ->config accesses > can be removed and the code cleaned up. > > Also fixes the following WARN_ON, because we don't have to iterate > atomic connectors any more: > > [ 1562.981768] ------------[ cut here ]------------ > [ 1562.981820] WARNING: CPU: 1 PID: 8667 at drivers/gpu/drm/i915/intel_hdmi.c:573 intel_hdmi_set_gcp_infoframe+0x225/0x230 [i915] > [ 1562.981825] WARN_ON(!drm_modeset_is_locked(&dev->mode_config.connection_mutex)) > [ 1562.981827] Modules linked in: > [ 1562.981830] vgem coretemp crct10dif_pclmul crc32_pclmul snd_hda_codec_hdmi ghash_clmulni_intel snd_hda_codec_realtek snd_hda_codec_generic snd_hda_intel snd_hda_codec snd_hwdep snd_hda_core snd_pcm lpc_ich i2c_designware_platform i2c_designware_core i915 r8169 mii sdhci_acpi i2c_hid sdhci mmc_core [last unloaded: vgem] > [ 1562.981874] CPU: 1 PID: 8667 Comm: kworker/u4:0 Tainted: G U 4.9.0-rc6-CI-CI_DRM_47+ #1 > [ 1562.981925] Workqueue: events_unbound intel_atomic_commit_work [i915] > [ 1562.981932] ffffc9000010faa0 ffffffff8142e415 ffffc9000010faf0 0000000000000000 > [ 1562.981940] ffffc9000010fae0 ffffffff8107e5c6 0000023d81818282 ffff880130808008 > [ 1562.981948] ffff8801308e8000 00000000001e1178 ffff88012f6a4548 ffff880130809068 > [ 1562.981955] Call Trace: > [ 1562.981963] [<ffffffff8142e415>] dump_stack+0x67/0x92 > [ 1562.981969] [<ffffffff8107e5c6>] __warn+0xc6/0xe0 > [ 1562.981974] [<ffffffff8107e62a>] warn_slowpath_fmt+0x4a/0x50 > [ 1562.981980] [<ffffffff810ed6b0>] ? rcu_read_lock_sched_held+0x70/0x80 > [ 1562.982025] [<ffffffffa0176cb5>] intel_hdmi_set_gcp_infoframe+0x225/0x230 [i915] > [ 1562.982072] [<ffffffffa0178937>] vlv_set_infoframes+0xd7/0x1a0 [i915] > [ 1562.982117] [<ffffffffa0177710>] vlv_hdmi_pre_enable+0x50/0x80 [i915] > [ 1562.982164] [<ffffffffa0132f83>] intel_encoders_pre_enable.isra.9+0x63/0x80 [i915] > [ 1562.982213] [<ffffffffa0144eac>] valleyview_crtc_enable+0xec/0x200 [i915] > [ 1562.982258] [<ffffffffa01416f9>] intel_update_crtc+0x49/0xe0 [i915] > [ 1562.982304] [<ffffffffa01417ee>] intel_update_crtcs+0x5e/0x80 [i915] > [ 1562.982350] [<ffffffffa0141f26>] intel_atomic_commit_tail+0x316/0xfd0 [i915] > [ 1562.982398] [<ffffffffa014314d>] intel_atomic_commit_work+0xd/0x10 [i915] > [ 1562.982404] [<ffffffff8109c35c>] process_one_work+0x1ec/0x6b0 > [ 1562.982408] [<ffffffff8109c2d6>] ? process_one_work+0x166/0x6b0 > [ 1562.982413] [<ffffffff8109c869>] worker_thread+0x49/0x490 > [ 1562.982432] [<ffffffff8109c820>] ? process_one_work+0x6b0/0x6b0 > [ 1562.982436] [<ffffffff810a2b8b>] kthread+0xeb/0x110 > [ 1562.982441] [<ffffffff810a2aa0>] ? kthread_park+0x60/0x60 > [ 1562.982446] [<ffffffff81818ce7>] ret_from_fork+0x27/0x40 > [ 1562.982450] ---[ end trace 7942c2355f036255 ]--- > > Testcase: kms_atomic_transition.1x-modeset-transitions-nonblocking > Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> > > diff --git a/drivers/gpu/drm/i915/intel_ddi.c b/drivers/gpu/drm/i915/intel_ddi.c > index 10ec9d4b7d45..0d680dabac77 100644 > --- a/drivers/gpu/drm/i915/intel_ddi.c > +++ b/drivers/gpu/drm/i915/intel_ddi.c > @@ -1701,7 +1701,8 @@ static void intel_ddi_pre_enable_dp(struct intel_encoder *encoder, > > static void intel_ddi_pre_enable_hdmi(struct intel_encoder *encoder, > bool has_hdmi_sink, > - struct drm_display_mode *adjusted_mode, > + const struct intel_crtc_state *crtc_state, > + const struct drm_connector_state *conn_state, > struct intel_shared_dpll *pll) > { > struct intel_hdmi *intel_hdmi = enc_to_intel_hdmi(&encoder->base); > @@ -1721,7 +1722,7 @@ static void intel_ddi_pre_enable_hdmi(struct intel_encoder *encoder, > > intel_hdmi->set_infoframes(drm_encoder, > has_hdmi_sink, > - adjusted_mode); > + crtc_state, conn_state); > } > > static void intel_ddi_pre_enable(struct intel_encoder *intel_encoder, > @@ -1742,8 +1743,8 @@ static void intel_ddi_pre_enable(struct intel_encoder *intel_encoder, > } > if (type == INTEL_OUTPUT_HDMI) { > intel_ddi_pre_enable_hdmi(intel_encoder, > - crtc->config->has_hdmi_sink, > - &crtc->config->base.adjusted_mode, > + pipe_config->has_hdmi_sink, > + pipe_config, conn_state, > crtc->config->shared_dpll); > } > } > diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h > index cd132c216a67..1733a1afc0c2 100644 > --- a/drivers/gpu/drm/i915/intel_drv.h > +++ b/drivers/gpu/drm/i915/intel_drv.h > @@ -840,11 +840,13 @@ struct intel_hdmi { > enum hdmi_picture_aspect aspect_ratio; > struct intel_connector *attached_connector; > void (*write_infoframe)(struct drm_encoder *encoder, > + const struct intel_crtc_state *cstate, > enum hdmi_infoframe_type type, > const void *frame, ssize_t len); > void (*set_infoframes)(struct drm_encoder *encoder, > bool enable, > - const struct drm_display_mode *adjusted_mode); > + const struct intel_crtc_state *crtc_state, > + const struct drm_connector_state *conn_state); > bool (*infoframe_enabled)(struct drm_encoder *encoder, > const struct intel_crtc_state *pipe_config); > }; > diff --git a/drivers/gpu/drm/i915/intel_hdmi.c b/drivers/gpu/drm/i915/intel_hdmi.c > index fb88e32e25a3..b9bad95bf8fe 100644 > --- a/drivers/gpu/drm/i915/intel_hdmi.c > +++ b/drivers/gpu/drm/i915/intel_hdmi.c > @@ -133,6 +133,7 @@ hsw_dip_data_reg(struct drm_i915_private *dev_priv, > } > > static void g4x_write_infoframe(struct drm_encoder *encoder, > + const struct intel_crtc_state *crtc_state, > enum hdmi_infoframe_type type, > const void *frame, ssize_t len) > { > @@ -187,13 +188,14 @@ static bool g4x_infoframe_enabled(struct drm_encoder *encoder, > } > > static void ibx_write_infoframe(struct drm_encoder *encoder, > + const struct intel_crtc_state *crtc_state, > enum hdmi_infoframe_type type, > const void *frame, ssize_t len) > { > const uint32_t *data = frame; > struct drm_device *dev = encoder->dev; > struct drm_i915_private *dev_priv = to_i915(dev); > - struct intel_crtc *intel_crtc = to_intel_crtc(encoder->crtc); > + struct intel_crtc *intel_crtc = to_intel_crtc(crtc_state->base.crtc); > i915_reg_t reg = TVIDEO_DIP_CTL(intel_crtc->pipe); > u32 val = I915_READ(reg); > int i; > @@ -246,13 +248,14 @@ static bool ibx_infoframe_enabled(struct drm_encoder *encoder, > } > > static void cpt_write_infoframe(struct drm_encoder *encoder, > + const struct intel_crtc_state *crtc_state, > enum hdmi_infoframe_type type, > const void *frame, ssize_t len) > { > const uint32_t *data = frame; > struct drm_device *dev = encoder->dev; > struct drm_i915_private *dev_priv = to_i915(dev); > - struct intel_crtc *intel_crtc = to_intel_crtc(encoder->crtc); > + struct intel_crtc *intel_crtc = to_intel_crtc(crtc_state->base.crtc); > i915_reg_t reg = TVIDEO_DIP_CTL(intel_crtc->pipe); > u32 val = I915_READ(reg); > int i; > @@ -303,13 +306,14 @@ static bool cpt_infoframe_enabled(struct drm_encoder *encoder, > } > > static void vlv_write_infoframe(struct drm_encoder *encoder, > + const struct intel_crtc_state *crtc_state, > enum hdmi_infoframe_type type, > const void *frame, ssize_t len) > { > const uint32_t *data = frame; > struct drm_device *dev = encoder->dev; > struct drm_i915_private *dev_priv = to_i915(dev); > - struct intel_crtc *intel_crtc = to_intel_crtc(encoder->crtc); > + struct intel_crtc *intel_crtc = to_intel_crtc(crtc_state->base.crtc); > i915_reg_t reg = VLV_TVIDEO_DIP_CTL(intel_crtc->pipe); > u32 val = I915_READ(reg); > int i; > @@ -361,14 +365,14 @@ static bool vlv_infoframe_enabled(struct drm_encoder *encoder, > } > > static void hsw_write_infoframe(struct drm_encoder *encoder, > + const struct intel_crtc_state *crtc_state, > enum hdmi_infoframe_type type, > const void *frame, ssize_t len) > { > const uint32_t *data = frame; > struct drm_device *dev = encoder->dev; > struct drm_i915_private *dev_priv = to_i915(dev); > - struct intel_crtc *intel_crtc = to_intel_crtc(encoder->crtc); > - enum transcoder cpu_transcoder = intel_crtc->config->cpu_transcoder; > + enum transcoder cpu_transcoder = crtc_state->cpu_transcoder; > i915_reg_t ctl_reg = HSW_TVIDEO_DIP_CTL(cpu_transcoder); > i915_reg_t data_reg; > int i; > @@ -425,6 +429,7 @@ static bool hsw_infoframe_enabled(struct drm_encoder *encoder, > * bytes by one. > */ > static void intel_write_infoframe(struct drm_encoder *encoder, > + const struct intel_crtc_state *crtc_state, > union hdmi_infoframe *frame) > { > struct intel_hdmi *intel_hdmi = enc_to_intel_hdmi(encoder); > @@ -443,26 +448,25 @@ static void intel_write_infoframe(struct drm_encoder *encoder, > buffer[3] = 0; > len++; > > - intel_hdmi->write_infoframe(encoder, frame->any.type, buffer, len); > + intel_hdmi->write_infoframe(encoder, crtc_state, frame->any.type, buffer, len); > } > > static void intel_hdmi_set_avi_infoframe(struct drm_encoder *encoder, > - const struct drm_display_mode *adjusted_mode) > + const struct intel_crtc_state *cstate) Please use a consistent naming scheme. The current situation with cstate vs. crtc_state vs. pipe_config is not nice at all, and I'd prefer we don't add to the mess any more. So for any new uses let's pick one name and stick to it. I would suggest plane_state/crtc_state/conn_state as the names we should use. > { > struct intel_hdmi *intel_hdmi = enc_to_intel_hdmi(encoder); > - struct intel_crtc *intel_crtc = to_intel_crtc(encoder->crtc); > union hdmi_infoframe frame; > int ret; > > ret = drm_hdmi_avi_infoframe_from_display_mode(&frame.avi, > - adjusted_mode); > + &cstate->base.adjusted_mode); > if (ret < 0) { > DRM_ERROR("couldn't fill AVI infoframe\n"); > return; > } > > if (intel_hdmi->rgb_quant_range_selectable) { > - if (intel_crtc->config->limited_color_range) > + if (cstate->limited_color_range) > frame.avi.quantization_range = > HDMI_QUANTIZATION_RANGE_LIMITED; > else > @@ -470,10 +474,11 @@ static void intel_hdmi_set_avi_infoframe(struct drm_encoder *encoder, > HDMI_QUANTIZATION_RANGE_FULL; > } > > - intel_write_infoframe(encoder, &frame); > + intel_write_infoframe(encoder, cstate, &frame); > } > > -static void intel_hdmi_set_spd_infoframe(struct drm_encoder *encoder) > +static void intel_hdmi_set_spd_infoframe(struct drm_encoder *encoder, > + const struct intel_crtc_state *crtc_state) > { > union hdmi_infoframe frame; > int ret; > @@ -486,27 +491,28 @@ static void intel_hdmi_set_spd_infoframe(struct drm_encoder *encoder) > > frame.spd.sdi = HDMI_SPD_SDI_PC; > > - intel_write_infoframe(encoder, &frame); > + intel_write_infoframe(encoder, crtc_state, &frame); > } > > static void > intel_hdmi_set_hdmi_infoframe(struct drm_encoder *encoder, > - const struct drm_display_mode *adjusted_mode) > + const struct intel_crtc_state *crtc_state) > { > union hdmi_infoframe frame; > int ret; > > ret = drm_hdmi_vendor_infoframe_from_display_mode(&frame.vendor.hdmi, > - adjusted_mode); > + &crtc_state->base.adjusted_mode); > if (ret < 0) > return; > > - intel_write_infoframe(encoder, &frame); > + intel_write_infoframe(encoder, crtc_state, &frame); > } > > static void g4x_set_infoframes(struct drm_encoder *encoder, > bool enable, > - const struct drm_display_mode *adjusted_mode) > + const struct intel_crtc_state *crtc_state, > + const struct drm_connector_state *conn_state) > { > struct drm_i915_private *dev_priv = to_i915(encoder->dev); > struct intel_digital_port *intel_dig_port = enc_to_dig_port(encoder); > @@ -560,28 +566,16 @@ static void g4x_set_infoframes(struct drm_encoder *encoder, > I915_WRITE(reg, val); > POSTING_READ(reg); > > - intel_hdmi_set_avi_infoframe(encoder, adjusted_mode); > - intel_hdmi_set_spd_infoframe(encoder); > - intel_hdmi_set_hdmi_infoframe(encoder, adjusted_mode); > + intel_hdmi_set_avi_infoframe(encoder, crtc_state); > + intel_hdmi_set_spd_infoframe(encoder, crtc_state); > + intel_hdmi_set_hdmi_infoframe(encoder, crtc_state); > } > > -static bool hdmi_sink_is_deep_color(struct drm_encoder *encoder) > +static bool hdmi_sink_is_deep_color(const struct drm_connector_state *conn_state) > { > - struct drm_device *dev = encoder->dev; > - struct drm_connector *connector; > - > - WARN_ON(!drm_modeset_is_locked(&dev->mode_config.connection_mutex)); > + struct drm_connector *connector = conn_state->connector; > > - /* > - * HDMI cloning is only supported on g4x which doesn't > - * support deep color or GCP infoframes anyway so no > - * need to worry about multiple HDMI sinks here. > - */ > - list_for_each_entry(connector, &dev->mode_config.connector_list, head) > - if (connector->encoder == encoder) > - return connector->display_info.bpc > 8; > - > - return false; > + return connector->display_info.bpc > 8; > } > > /* > @@ -627,15 +621,17 @@ static bool gcp_default_phase_possible(int pipe_bpp, > mode->crtc_htotal/2 % pixels_per_group == 0); > } > > -static bool intel_hdmi_set_gcp_infoframe(struct drm_encoder *encoder) > +static bool intel_hdmi_set_gcp_infoframe(struct drm_encoder *encoder, > + const struct intel_crtc_state *cstate, > + const struct drm_connector_state *conn_state) > { > struct drm_i915_private *dev_priv = to_i915(encoder->dev); > - struct intel_crtc *crtc = to_intel_crtc(encoder->crtc); > + struct intel_crtc *crtc = to_intel_crtc(cstate->base.crtc); > i915_reg_t reg; > u32 val = 0; > > if (HAS_DDI(dev_priv)) > - reg = HSW_TVIDEO_DIP_GCP(crtc->config->cpu_transcoder); > + reg = HSW_TVIDEO_DIP_GCP(cstate->cpu_transcoder); > else if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) > reg = VLV_TVIDEO_DIP_GCP(crtc->pipe); > else if (HAS_PCH_SPLIT(dev_priv)) > @@ -644,12 +640,12 @@ static bool intel_hdmi_set_gcp_infoframe(struct drm_encoder *encoder) > return false; > > /* Indicate color depth whenever the sink supports deep color */ > - if (hdmi_sink_is_deep_color(encoder)) > + if (hdmi_sink_is_deep_color(conn_state)) > val |= GCP_COLOR_INDICATION; > > /* Enable default_phase whenever the display mode is suitably aligned */ > - if (gcp_default_phase_possible(crtc->config->pipe_bpp, > - &crtc->config->base.adjusted_mode)) > + if (gcp_default_phase_possible(cstate->pipe_bpp, > + &cstate->base.adjusted_mode)) > val |= GCP_DEFAULT_PHASE_ENABLE; > > I915_WRITE(reg, val); > @@ -659,10 +655,11 @@ static bool intel_hdmi_set_gcp_infoframe(struct drm_encoder *encoder) > > static void ibx_set_infoframes(struct drm_encoder *encoder, > bool enable, > - const struct drm_display_mode *adjusted_mode) > + const struct intel_crtc_state *crtc_state, > + const struct drm_connector_state *conn_state) > { > struct drm_i915_private *dev_priv = to_i915(encoder->dev); > - struct intel_crtc *intel_crtc = to_intel_crtc(encoder->crtc); > + struct intel_crtc *intel_crtc = to_intel_crtc(crtc_state->base.crtc); > struct intel_digital_port *intel_dig_port = enc_to_dig_port(encoder); > struct intel_hdmi *intel_hdmi = &intel_dig_port->hdmi; > i915_reg_t reg = TVIDEO_DIP_CTL(intel_crtc->pipe); > @@ -698,23 +695,24 @@ static void ibx_set_infoframes(struct drm_encoder *encoder, > VIDEO_DIP_ENABLE_VENDOR | VIDEO_DIP_ENABLE_GAMUT | > VIDEO_DIP_ENABLE_SPD | VIDEO_DIP_ENABLE_GCP); > > - if (intel_hdmi_set_gcp_infoframe(encoder)) > + if (intel_hdmi_set_gcp_infoframe(encoder, crtc_state, conn_state)) > val |= VIDEO_DIP_ENABLE_GCP; > > I915_WRITE(reg, val); > POSTING_READ(reg); > > - intel_hdmi_set_avi_infoframe(encoder, adjusted_mode); > - intel_hdmi_set_spd_infoframe(encoder); > - intel_hdmi_set_hdmi_infoframe(encoder, adjusted_mode); > + intel_hdmi_set_avi_infoframe(encoder, crtc_state); > + intel_hdmi_set_spd_infoframe(encoder, crtc_state); > + intel_hdmi_set_hdmi_infoframe(encoder, crtc_state); > } > > static void cpt_set_infoframes(struct drm_encoder *encoder, > bool enable, > - const struct drm_display_mode *adjusted_mode) > + const struct intel_crtc_state *crtc_state, > + const struct drm_connector_state *conn_state) > { > struct drm_i915_private *dev_priv = to_i915(encoder->dev); > - struct intel_crtc *intel_crtc = to_intel_crtc(encoder->crtc); > + struct intel_crtc *intel_crtc = to_intel_crtc(crtc_state->base.crtc); > struct intel_hdmi *intel_hdmi = enc_to_intel_hdmi(encoder); > i915_reg_t reg = TVIDEO_DIP_CTL(intel_crtc->pipe); > u32 val = I915_READ(reg); > @@ -740,24 +738,25 @@ static void cpt_set_infoframes(struct drm_encoder *encoder, > val &= ~(VIDEO_DIP_ENABLE_VENDOR | VIDEO_DIP_ENABLE_GAMUT | > VIDEO_DIP_ENABLE_SPD | VIDEO_DIP_ENABLE_GCP); > > - if (intel_hdmi_set_gcp_infoframe(encoder)) > + if (intel_hdmi_set_gcp_infoframe(encoder, crtc_state, conn_state)) > val |= VIDEO_DIP_ENABLE_GCP; > > I915_WRITE(reg, val); > POSTING_READ(reg); > > - intel_hdmi_set_avi_infoframe(encoder, adjusted_mode); > - intel_hdmi_set_spd_infoframe(encoder); > - intel_hdmi_set_hdmi_infoframe(encoder, adjusted_mode); > + intel_hdmi_set_avi_infoframe(encoder, crtc_state); > + intel_hdmi_set_spd_infoframe(encoder, crtc_state); > + intel_hdmi_set_hdmi_infoframe(encoder, crtc_state); > } > > static void vlv_set_infoframes(struct drm_encoder *encoder, > bool enable, > - const struct drm_display_mode *adjusted_mode) > + const struct intel_crtc_state *crtc_state, > + const struct drm_connector_state *conn_state) > { > struct drm_i915_private *dev_priv = to_i915(encoder->dev); > struct intel_digital_port *intel_dig_port = enc_to_dig_port(encoder); > - struct intel_crtc *intel_crtc = to_intel_crtc(encoder->crtc); > + struct intel_crtc *intel_crtc = to_intel_crtc(crtc_state->base.crtc); > struct intel_hdmi *intel_hdmi = enc_to_intel_hdmi(encoder); > i915_reg_t reg = VLV_TVIDEO_DIP_CTL(intel_crtc->pipe); > u32 val = I915_READ(reg); > @@ -792,25 +791,25 @@ static void vlv_set_infoframes(struct drm_encoder *encoder, > VIDEO_DIP_ENABLE_VENDOR | VIDEO_DIP_ENABLE_GAMUT | > VIDEO_DIP_ENABLE_SPD | VIDEO_DIP_ENABLE_GCP); > > - if (intel_hdmi_set_gcp_infoframe(encoder)) > + if (intel_hdmi_set_gcp_infoframe(encoder, crtc_state, conn_state)) > val |= VIDEO_DIP_ENABLE_GCP; > > I915_WRITE(reg, val); > POSTING_READ(reg); > > - intel_hdmi_set_avi_infoframe(encoder, adjusted_mode); > - intel_hdmi_set_spd_infoframe(encoder); > - intel_hdmi_set_hdmi_infoframe(encoder, adjusted_mode); > + intel_hdmi_set_avi_infoframe(encoder, crtc_state); > + intel_hdmi_set_spd_infoframe(encoder, crtc_state); > + intel_hdmi_set_hdmi_infoframe(encoder, crtc_state); > } > > static void hsw_set_infoframes(struct drm_encoder *encoder, > bool enable, > - const struct drm_display_mode *adjusted_mode) > + const struct intel_crtc_state *crtc_state, > + const struct drm_connector_state *conn_state) > { > struct drm_i915_private *dev_priv = to_i915(encoder->dev); > - struct intel_crtc *intel_crtc = to_intel_crtc(encoder->crtc); > struct intel_hdmi *intel_hdmi = enc_to_intel_hdmi(encoder); > - i915_reg_t reg = HSW_TVIDEO_DIP_CTL(intel_crtc->config->cpu_transcoder); > + i915_reg_t reg = HSW_TVIDEO_DIP_CTL(crtc_state->cpu_transcoder); > u32 val = I915_READ(reg); > > assert_hdmi_port_disabled(intel_hdmi); > @@ -825,15 +824,15 @@ static void hsw_set_infoframes(struct drm_encoder *encoder, > return; > } > > - if (intel_hdmi_set_gcp_infoframe(encoder)) > + if (intel_hdmi_set_gcp_infoframe(encoder, crtc_state, conn_state)) > val |= VIDEO_DIP_ENABLE_GCP_HSW; > > I915_WRITE(reg, val); > POSTING_READ(reg); > > - intel_hdmi_set_avi_infoframe(encoder, adjusted_mode); > - intel_hdmi_set_spd_infoframe(encoder); > - intel_hdmi_set_hdmi_infoframe(encoder, adjusted_mode); > + intel_hdmi_set_avi_infoframe(encoder, crtc_state); > + intel_hdmi_set_spd_infoframe(encoder, crtc_state); > + intel_hdmi_set_hdmi_infoframe(encoder, crtc_state); > } > > void intel_dp_dual_mode_set_tmds_output(struct intel_hdmi *hdmi, bool enable) > @@ -852,31 +851,32 @@ void intel_dp_dual_mode_set_tmds_output(struct intel_hdmi *hdmi, bool enable) > adapter, enable); > } > > -static void intel_hdmi_prepare(struct intel_encoder *encoder) > +static void intel_hdmi_prepare(struct intel_encoder *encoder, > + const struct intel_crtc_state *crtc_state) > { > struct drm_device *dev = encoder->base.dev; > struct drm_i915_private *dev_priv = to_i915(dev); > - struct intel_crtc *crtc = to_intel_crtc(encoder->base.crtc); > + struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); > struct intel_hdmi *intel_hdmi = enc_to_intel_hdmi(&encoder->base); > - const struct drm_display_mode *adjusted_mode = &crtc->config->base.adjusted_mode; > + const struct drm_display_mode *adjusted_mode = &crtc_state->base.adjusted_mode; > u32 hdmi_val; > > intel_dp_dual_mode_set_tmds_output(intel_hdmi, true); > > hdmi_val = SDVO_ENCODING_HDMI; > - if (!HAS_PCH_SPLIT(dev_priv) && crtc->config->limited_color_range) > + if (!HAS_PCH_SPLIT(dev_priv) && crtc_state->limited_color_range) > hdmi_val |= HDMI_COLOR_RANGE_16_235; > if (adjusted_mode->flags & DRM_MODE_FLAG_PVSYNC) > hdmi_val |= SDVO_VSYNC_ACTIVE_HIGH; > if (adjusted_mode->flags & DRM_MODE_FLAG_PHSYNC) > hdmi_val |= SDVO_HSYNC_ACTIVE_HIGH; > > - if (crtc->config->pipe_bpp > 24) > + if (crtc_state->pipe_bpp > 24) > hdmi_val |= HDMI_COLOR_FORMAT_12bpc; > else > hdmi_val |= SDVO_COLOR_FORMAT_8bpc; > > - if (crtc->config->has_hdmi_sink) > + if (crtc_state->has_hdmi_sink) > hdmi_val |= HDMI_MODE_SELECT_HDMI; > > if (HAS_PCH_CPT(dev_priv)) > @@ -979,9 +979,9 @@ static void intel_enable_hdmi_audio(struct intel_encoder *encoder, > struct intel_crtc_state *pipe_config, > struct drm_connector_state *conn_state) > { > - struct intel_crtc *crtc = to_intel_crtc(encoder->base.crtc); > + struct intel_crtc *crtc = to_intel_crtc(pipe_config->base.crtc); > > - WARN_ON(!crtc->config->has_hdmi_sink); > + WARN_ON(!pipe_config->has_hdmi_sink); > DRM_DEBUG_DRIVER("Enabling HDMI audio on pipe %c\n", > pipe_name(crtc->pipe)); > intel_audio_codec_enable(encoder, pipe_config, conn_state); > @@ -1015,14 +1015,13 @@ static void ibx_enable_hdmi(struct intel_encoder *encoder, > { > struct drm_device *dev = encoder->base.dev; > struct drm_i915_private *dev_priv = to_i915(dev); > - struct intel_crtc *crtc = to_intel_crtc(encoder->base.crtc); > struct intel_hdmi *intel_hdmi = enc_to_intel_hdmi(&encoder->base); > u32 temp; > > temp = I915_READ(intel_hdmi->hdmi_reg); > > temp |= SDVO_ENABLE; > - if (crtc->config->has_audio) > + if (pipe_config->has_audio) > temp |= SDVO_AUDIO_ENABLE; > > /* > @@ -1066,7 +1065,7 @@ static void cpt_enable_hdmi(struct intel_encoder *encoder, > { > struct drm_device *dev = encoder->base.dev; > struct drm_i915_private *dev_priv = to_i915(dev); > - struct intel_crtc *crtc = to_intel_crtc(encoder->base.crtc); > + struct intel_crtc *crtc = to_intel_crtc(pipe_config->base.crtc); > struct intel_hdmi *intel_hdmi = enc_to_intel_hdmi(&encoder->base); > enum pipe pipe = crtc->pipe; > u32 temp; > @@ -1128,7 +1127,7 @@ static void intel_disable_hdmi(struct intel_encoder *encoder, > struct drm_device *dev = encoder->base.dev; > struct drm_i915_private *dev_priv = to_i915(dev); > struct intel_hdmi *intel_hdmi = enc_to_intel_hdmi(&encoder->base); > - struct intel_crtc *crtc = to_intel_crtc(encoder->base.crtc); > + struct intel_crtc *crtc = to_intel_crtc(old_crtc_state->base.crtc); > u32 temp; > > temp = I915_READ(intel_hdmi->hdmi_reg); > @@ -1170,7 +1169,7 @@ static void intel_disable_hdmi(struct intel_encoder *encoder, > intel_set_pch_fifo_underrun_reporting(dev_priv, PIPE_A, true); > } > > - intel_hdmi->set_infoframes(&encoder->base, false, NULL); > + intel_hdmi->set_infoframes(&encoder->base, false, old_crtc_state, old_conn_state); > > intel_dp_dual_mode_set_tmds_output(intel_hdmi, false); > } > @@ -1642,13 +1641,12 @@ static void intel_hdmi_pre_enable(struct intel_encoder *encoder, > struct drm_connector_state *conn_state) > { > struct intel_hdmi *intel_hdmi = enc_to_intel_hdmi(&encoder->base); > - const struct drm_display_mode *adjusted_mode = &pipe_config->base.adjusted_mode; > > - intel_hdmi_prepare(encoder); > + intel_hdmi_prepare(encoder, pipe_config); > > intel_hdmi->set_infoframes(&encoder->base, > pipe_config->has_hdmi_sink, > - adjusted_mode); > + pipe_config, conn_state); > } > > static void vlv_hdmi_pre_enable(struct intel_encoder *encoder, > @@ -1659,7 +1657,6 @@ static void vlv_hdmi_pre_enable(struct intel_encoder *encoder, > struct intel_hdmi *intel_hdmi = &dport->hdmi; > struct drm_device *dev = encoder->base.dev; > struct drm_i915_private *dev_priv = to_i915(dev); > - const struct drm_display_mode *adjusted_mode = &pipe_config->base.adjusted_mode; > > vlv_phy_pre_encoder_enable(encoder); > > @@ -1669,7 +1666,7 @@ static void vlv_hdmi_pre_enable(struct intel_encoder *encoder, > > intel_hdmi->set_infoframes(&encoder->base, > pipe_config->has_hdmi_sink, > - adjusted_mode); > + pipe_config, conn_state); > > g4x_enable_hdmi(encoder, pipe_config, conn_state); > > @@ -1680,7 +1677,7 @@ static void vlv_hdmi_pre_pll_enable(struct intel_encoder *encoder, > struct intel_crtc_state *pipe_config, > struct drm_connector_state *conn_state) > { > - intel_hdmi_prepare(encoder); > + intel_hdmi_prepare(encoder, pipe_config); > > vlv_phy_pre_pll_enable(encoder); > } > @@ -1689,7 +1686,7 @@ static void chv_hdmi_pre_pll_enable(struct intel_encoder *encoder, > struct intel_crtc_state *pipe_config, > struct drm_connector_state *conn_state) > { > - intel_hdmi_prepare(encoder); > + intel_hdmi_prepare(encoder, pipe_config); > > chv_phy_pre_pll_enable(encoder); > } > @@ -1732,9 +1729,6 @@ static void chv_hdmi_pre_enable(struct intel_encoder *encoder, > struct intel_hdmi *intel_hdmi = &dport->hdmi; > struct drm_device *dev = encoder->base.dev; > struct drm_i915_private *dev_priv = to_i915(dev); > - struct intel_crtc *intel_crtc = > - to_intel_crtc(encoder->base.crtc); > - const struct drm_display_mode *adjusted_mode = &intel_crtc->config->base.adjusted_mode; > > chv_phy_pre_encoder_enable(encoder); > > @@ -1743,8 +1737,8 @@ static void chv_hdmi_pre_enable(struct intel_encoder *encoder, > chv_set_phy_signal_level(encoder, 128, 102, false); > > intel_hdmi->set_infoframes(&encoder->base, > - intel_crtc->config->has_hdmi_sink, > - adjusted_mode); > + pipe_config->has_hdmi_sink, > + pipe_config, conn_state); > > g4x_enable_hdmi(encoder, pipe_config, conn_state); > > > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@lists.freedesktop.org > https://lists.freedesktop.org/mailman/listinfo/intel-gfx
diff --git a/drivers/gpu/drm/i915/intel_ddi.c b/drivers/gpu/drm/i915/intel_ddi.c index 10ec9d4b7d45..0d680dabac77 100644 --- a/drivers/gpu/drm/i915/intel_ddi.c +++ b/drivers/gpu/drm/i915/intel_ddi.c @@ -1701,7 +1701,8 @@ static void intel_ddi_pre_enable_dp(struct intel_encoder *encoder, static void intel_ddi_pre_enable_hdmi(struct intel_encoder *encoder, bool has_hdmi_sink, - struct drm_display_mode *adjusted_mode, + const struct intel_crtc_state *crtc_state, + const struct drm_connector_state *conn_state, struct intel_shared_dpll *pll) { struct intel_hdmi *intel_hdmi = enc_to_intel_hdmi(&encoder->base); @@ -1721,7 +1722,7 @@ static void intel_ddi_pre_enable_hdmi(struct intel_encoder *encoder, intel_hdmi->set_infoframes(drm_encoder, has_hdmi_sink, - adjusted_mode); + crtc_state, conn_state); } static void intel_ddi_pre_enable(struct intel_encoder *intel_encoder, @@ -1742,8 +1743,8 @@ static void intel_ddi_pre_enable(struct intel_encoder *intel_encoder, } if (type == INTEL_OUTPUT_HDMI) { intel_ddi_pre_enable_hdmi(intel_encoder, - crtc->config->has_hdmi_sink, - &crtc->config->base.adjusted_mode, + pipe_config->has_hdmi_sink, + pipe_config, conn_state, crtc->config->shared_dpll); } } diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h index cd132c216a67..1733a1afc0c2 100644 --- a/drivers/gpu/drm/i915/intel_drv.h +++ b/drivers/gpu/drm/i915/intel_drv.h @@ -840,11 +840,13 @@ struct intel_hdmi { enum hdmi_picture_aspect aspect_ratio; struct intel_connector *attached_connector; void (*write_infoframe)(struct drm_encoder *encoder, + const struct intel_crtc_state *cstate, enum hdmi_infoframe_type type, const void *frame, ssize_t len); void (*set_infoframes)(struct drm_encoder *encoder, bool enable, - const struct drm_display_mode *adjusted_mode); + const struct intel_crtc_state *crtc_state, + const struct drm_connector_state *conn_state); bool (*infoframe_enabled)(struct drm_encoder *encoder, const struct intel_crtc_state *pipe_config); }; diff --git a/drivers/gpu/drm/i915/intel_hdmi.c b/drivers/gpu/drm/i915/intel_hdmi.c index fb88e32e25a3..b9bad95bf8fe 100644 --- a/drivers/gpu/drm/i915/intel_hdmi.c +++ b/drivers/gpu/drm/i915/intel_hdmi.c @@ -133,6 +133,7 @@ hsw_dip_data_reg(struct drm_i915_private *dev_priv, } static void g4x_write_infoframe(struct drm_encoder *encoder, + const struct intel_crtc_state *crtc_state, enum hdmi_infoframe_type type, const void *frame, ssize_t len) { @@ -187,13 +188,14 @@ static bool g4x_infoframe_enabled(struct drm_encoder *encoder, } static void ibx_write_infoframe(struct drm_encoder *encoder, + const struct intel_crtc_state *crtc_state, enum hdmi_infoframe_type type, const void *frame, ssize_t len) { const uint32_t *data = frame; struct drm_device *dev = encoder->dev; struct drm_i915_private *dev_priv = to_i915(dev); - struct intel_crtc *intel_crtc = to_intel_crtc(encoder->crtc); + struct intel_crtc *intel_crtc = to_intel_crtc(crtc_state->base.crtc); i915_reg_t reg = TVIDEO_DIP_CTL(intel_crtc->pipe); u32 val = I915_READ(reg); int i; @@ -246,13 +248,14 @@ static bool ibx_infoframe_enabled(struct drm_encoder *encoder, } static void cpt_write_infoframe(struct drm_encoder *encoder, + const struct intel_crtc_state *crtc_state, enum hdmi_infoframe_type type, const void *frame, ssize_t len) { const uint32_t *data = frame; struct drm_device *dev = encoder->dev; struct drm_i915_private *dev_priv = to_i915(dev); - struct intel_crtc *intel_crtc = to_intel_crtc(encoder->crtc); + struct intel_crtc *intel_crtc = to_intel_crtc(crtc_state->base.crtc); i915_reg_t reg = TVIDEO_DIP_CTL(intel_crtc->pipe); u32 val = I915_READ(reg); int i; @@ -303,13 +306,14 @@ static bool cpt_infoframe_enabled(struct drm_encoder *encoder, } static void vlv_write_infoframe(struct drm_encoder *encoder, + const struct intel_crtc_state *crtc_state, enum hdmi_infoframe_type type, const void *frame, ssize_t len) { const uint32_t *data = frame; struct drm_device *dev = encoder->dev; struct drm_i915_private *dev_priv = to_i915(dev); - struct intel_crtc *intel_crtc = to_intel_crtc(encoder->crtc); + struct intel_crtc *intel_crtc = to_intel_crtc(crtc_state->base.crtc); i915_reg_t reg = VLV_TVIDEO_DIP_CTL(intel_crtc->pipe); u32 val = I915_READ(reg); int i; @@ -361,14 +365,14 @@ static bool vlv_infoframe_enabled(struct drm_encoder *encoder, } static void hsw_write_infoframe(struct drm_encoder *encoder, + const struct intel_crtc_state *crtc_state, enum hdmi_infoframe_type type, const void *frame, ssize_t len) { const uint32_t *data = frame; struct drm_device *dev = encoder->dev; struct drm_i915_private *dev_priv = to_i915(dev); - struct intel_crtc *intel_crtc = to_intel_crtc(encoder->crtc); - enum transcoder cpu_transcoder = intel_crtc->config->cpu_transcoder; + enum transcoder cpu_transcoder = crtc_state->cpu_transcoder; i915_reg_t ctl_reg = HSW_TVIDEO_DIP_CTL(cpu_transcoder); i915_reg_t data_reg; int i; @@ -425,6 +429,7 @@ static bool hsw_infoframe_enabled(struct drm_encoder *encoder, * bytes by one. */ static void intel_write_infoframe(struct drm_encoder *encoder, + const struct intel_crtc_state *crtc_state, union hdmi_infoframe *frame) { struct intel_hdmi *intel_hdmi = enc_to_intel_hdmi(encoder); @@ -443,26 +448,25 @@ static void intel_write_infoframe(struct drm_encoder *encoder, buffer[3] = 0; len++; - intel_hdmi->write_infoframe(encoder, frame->any.type, buffer, len); + intel_hdmi->write_infoframe(encoder, crtc_state, frame->any.type, buffer, len); } static void intel_hdmi_set_avi_infoframe(struct drm_encoder *encoder, - const struct drm_display_mode *adjusted_mode) + const struct intel_crtc_state *cstate) { struct intel_hdmi *intel_hdmi = enc_to_intel_hdmi(encoder); - struct intel_crtc *intel_crtc = to_intel_crtc(encoder->crtc); union hdmi_infoframe frame; int ret; ret = drm_hdmi_avi_infoframe_from_display_mode(&frame.avi, - adjusted_mode); + &cstate->base.adjusted_mode); if (ret < 0) { DRM_ERROR("couldn't fill AVI infoframe\n"); return; } if (intel_hdmi->rgb_quant_range_selectable) { - if (intel_crtc->config->limited_color_range) + if (cstate->limited_color_range) frame.avi.quantization_range = HDMI_QUANTIZATION_RANGE_LIMITED; else @@ -470,10 +474,11 @@ static void intel_hdmi_set_avi_infoframe(struct drm_encoder *encoder, HDMI_QUANTIZATION_RANGE_FULL; } - intel_write_infoframe(encoder, &frame); + intel_write_infoframe(encoder, cstate, &frame); } -static void intel_hdmi_set_spd_infoframe(struct drm_encoder *encoder) +static void intel_hdmi_set_spd_infoframe(struct drm_encoder *encoder, + const struct intel_crtc_state *crtc_state) { union hdmi_infoframe frame; int ret; @@ -486,27 +491,28 @@ static void intel_hdmi_set_spd_infoframe(struct drm_encoder *encoder) frame.spd.sdi = HDMI_SPD_SDI_PC; - intel_write_infoframe(encoder, &frame); + intel_write_infoframe(encoder, crtc_state, &frame); } static void intel_hdmi_set_hdmi_infoframe(struct drm_encoder *encoder, - const struct drm_display_mode *adjusted_mode) + const struct intel_crtc_state *crtc_state) { union hdmi_infoframe frame; int ret; ret = drm_hdmi_vendor_infoframe_from_display_mode(&frame.vendor.hdmi, - adjusted_mode); + &crtc_state->base.adjusted_mode); if (ret < 0) return; - intel_write_infoframe(encoder, &frame); + intel_write_infoframe(encoder, crtc_state, &frame); } static void g4x_set_infoframes(struct drm_encoder *encoder, bool enable, - const struct drm_display_mode *adjusted_mode) + const struct intel_crtc_state *crtc_state, + const struct drm_connector_state *conn_state) { struct drm_i915_private *dev_priv = to_i915(encoder->dev); struct intel_digital_port *intel_dig_port = enc_to_dig_port(encoder); @@ -560,28 +566,16 @@ static void g4x_set_infoframes(struct drm_encoder *encoder, I915_WRITE(reg, val); POSTING_READ(reg); - intel_hdmi_set_avi_infoframe(encoder, adjusted_mode); - intel_hdmi_set_spd_infoframe(encoder); - intel_hdmi_set_hdmi_infoframe(encoder, adjusted_mode); + intel_hdmi_set_avi_infoframe(encoder, crtc_state); + intel_hdmi_set_spd_infoframe(encoder, crtc_state); + intel_hdmi_set_hdmi_infoframe(encoder, crtc_state); } -static bool hdmi_sink_is_deep_color(struct drm_encoder *encoder) +static bool hdmi_sink_is_deep_color(const struct drm_connector_state *conn_state) { - struct drm_device *dev = encoder->dev; - struct drm_connector *connector; - - WARN_ON(!drm_modeset_is_locked(&dev->mode_config.connection_mutex)); + struct drm_connector *connector = conn_state->connector; - /* - * HDMI cloning is only supported on g4x which doesn't - * support deep color or GCP infoframes anyway so no - * need to worry about multiple HDMI sinks here. - */ - list_for_each_entry(connector, &dev->mode_config.connector_list, head) - if (connector->encoder == encoder) - return connector->display_info.bpc > 8; - - return false; + return connector->display_info.bpc > 8; } /* @@ -627,15 +621,17 @@ static bool gcp_default_phase_possible(int pipe_bpp, mode->crtc_htotal/2 % pixels_per_group == 0); } -static bool intel_hdmi_set_gcp_infoframe(struct drm_encoder *encoder) +static bool intel_hdmi_set_gcp_infoframe(struct drm_encoder *encoder, + const struct intel_crtc_state *cstate, + const struct drm_connector_state *conn_state) { struct drm_i915_private *dev_priv = to_i915(encoder->dev); - struct intel_crtc *crtc = to_intel_crtc(encoder->crtc); + struct intel_crtc *crtc = to_intel_crtc(cstate->base.crtc); i915_reg_t reg; u32 val = 0; if (HAS_DDI(dev_priv)) - reg = HSW_TVIDEO_DIP_GCP(crtc->config->cpu_transcoder); + reg = HSW_TVIDEO_DIP_GCP(cstate->cpu_transcoder); else if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) reg = VLV_TVIDEO_DIP_GCP(crtc->pipe); else if (HAS_PCH_SPLIT(dev_priv)) @@ -644,12 +640,12 @@ static bool intel_hdmi_set_gcp_infoframe(struct drm_encoder *encoder) return false; /* Indicate color depth whenever the sink supports deep color */ - if (hdmi_sink_is_deep_color(encoder)) + if (hdmi_sink_is_deep_color(conn_state)) val |= GCP_COLOR_INDICATION; /* Enable default_phase whenever the display mode is suitably aligned */ - if (gcp_default_phase_possible(crtc->config->pipe_bpp, - &crtc->config->base.adjusted_mode)) + if (gcp_default_phase_possible(cstate->pipe_bpp, + &cstate->base.adjusted_mode)) val |= GCP_DEFAULT_PHASE_ENABLE; I915_WRITE(reg, val); @@ -659,10 +655,11 @@ static bool intel_hdmi_set_gcp_infoframe(struct drm_encoder *encoder) static void ibx_set_infoframes(struct drm_encoder *encoder, bool enable, - const struct drm_display_mode *adjusted_mode) + const struct intel_crtc_state *crtc_state, + const struct drm_connector_state *conn_state) { struct drm_i915_private *dev_priv = to_i915(encoder->dev); - struct intel_crtc *intel_crtc = to_intel_crtc(encoder->crtc); + struct intel_crtc *intel_crtc = to_intel_crtc(crtc_state->base.crtc); struct intel_digital_port *intel_dig_port = enc_to_dig_port(encoder); struct intel_hdmi *intel_hdmi = &intel_dig_port->hdmi; i915_reg_t reg = TVIDEO_DIP_CTL(intel_crtc->pipe); @@ -698,23 +695,24 @@ static void ibx_set_infoframes(struct drm_encoder *encoder, VIDEO_DIP_ENABLE_VENDOR | VIDEO_DIP_ENABLE_GAMUT | VIDEO_DIP_ENABLE_SPD | VIDEO_DIP_ENABLE_GCP); - if (intel_hdmi_set_gcp_infoframe(encoder)) + if (intel_hdmi_set_gcp_infoframe(encoder, crtc_state, conn_state)) val |= VIDEO_DIP_ENABLE_GCP; I915_WRITE(reg, val); POSTING_READ(reg); - intel_hdmi_set_avi_infoframe(encoder, adjusted_mode); - intel_hdmi_set_spd_infoframe(encoder); - intel_hdmi_set_hdmi_infoframe(encoder, adjusted_mode); + intel_hdmi_set_avi_infoframe(encoder, crtc_state); + intel_hdmi_set_spd_infoframe(encoder, crtc_state); + intel_hdmi_set_hdmi_infoframe(encoder, crtc_state); } static void cpt_set_infoframes(struct drm_encoder *encoder, bool enable, - const struct drm_display_mode *adjusted_mode) + const struct intel_crtc_state *crtc_state, + const struct drm_connector_state *conn_state) { struct drm_i915_private *dev_priv = to_i915(encoder->dev); - struct intel_crtc *intel_crtc = to_intel_crtc(encoder->crtc); + struct intel_crtc *intel_crtc = to_intel_crtc(crtc_state->base.crtc); struct intel_hdmi *intel_hdmi = enc_to_intel_hdmi(encoder); i915_reg_t reg = TVIDEO_DIP_CTL(intel_crtc->pipe); u32 val = I915_READ(reg); @@ -740,24 +738,25 @@ static void cpt_set_infoframes(struct drm_encoder *encoder, val &= ~(VIDEO_DIP_ENABLE_VENDOR | VIDEO_DIP_ENABLE_GAMUT | VIDEO_DIP_ENABLE_SPD | VIDEO_DIP_ENABLE_GCP); - if (intel_hdmi_set_gcp_infoframe(encoder)) + if (intel_hdmi_set_gcp_infoframe(encoder, crtc_state, conn_state)) val |= VIDEO_DIP_ENABLE_GCP; I915_WRITE(reg, val); POSTING_READ(reg); - intel_hdmi_set_avi_infoframe(encoder, adjusted_mode); - intel_hdmi_set_spd_infoframe(encoder); - intel_hdmi_set_hdmi_infoframe(encoder, adjusted_mode); + intel_hdmi_set_avi_infoframe(encoder, crtc_state); + intel_hdmi_set_spd_infoframe(encoder, crtc_state); + intel_hdmi_set_hdmi_infoframe(encoder, crtc_state); } static void vlv_set_infoframes(struct drm_encoder *encoder, bool enable, - const struct drm_display_mode *adjusted_mode) + const struct intel_crtc_state *crtc_state, + const struct drm_connector_state *conn_state) { struct drm_i915_private *dev_priv = to_i915(encoder->dev); struct intel_digital_port *intel_dig_port = enc_to_dig_port(encoder); - struct intel_crtc *intel_crtc = to_intel_crtc(encoder->crtc); + struct intel_crtc *intel_crtc = to_intel_crtc(crtc_state->base.crtc); struct intel_hdmi *intel_hdmi = enc_to_intel_hdmi(encoder); i915_reg_t reg = VLV_TVIDEO_DIP_CTL(intel_crtc->pipe); u32 val = I915_READ(reg); @@ -792,25 +791,25 @@ static void vlv_set_infoframes(struct drm_encoder *encoder, VIDEO_DIP_ENABLE_VENDOR | VIDEO_DIP_ENABLE_GAMUT | VIDEO_DIP_ENABLE_SPD | VIDEO_DIP_ENABLE_GCP); - if (intel_hdmi_set_gcp_infoframe(encoder)) + if (intel_hdmi_set_gcp_infoframe(encoder, crtc_state, conn_state)) val |= VIDEO_DIP_ENABLE_GCP; I915_WRITE(reg, val); POSTING_READ(reg); - intel_hdmi_set_avi_infoframe(encoder, adjusted_mode); - intel_hdmi_set_spd_infoframe(encoder); - intel_hdmi_set_hdmi_infoframe(encoder, adjusted_mode); + intel_hdmi_set_avi_infoframe(encoder, crtc_state); + intel_hdmi_set_spd_infoframe(encoder, crtc_state); + intel_hdmi_set_hdmi_infoframe(encoder, crtc_state); } static void hsw_set_infoframes(struct drm_encoder *encoder, bool enable, - const struct drm_display_mode *adjusted_mode) + const struct intel_crtc_state *crtc_state, + const struct drm_connector_state *conn_state) { struct drm_i915_private *dev_priv = to_i915(encoder->dev); - struct intel_crtc *intel_crtc = to_intel_crtc(encoder->crtc); struct intel_hdmi *intel_hdmi = enc_to_intel_hdmi(encoder); - i915_reg_t reg = HSW_TVIDEO_DIP_CTL(intel_crtc->config->cpu_transcoder); + i915_reg_t reg = HSW_TVIDEO_DIP_CTL(crtc_state->cpu_transcoder); u32 val = I915_READ(reg); assert_hdmi_port_disabled(intel_hdmi); @@ -825,15 +824,15 @@ static void hsw_set_infoframes(struct drm_encoder *encoder, return; } - if (intel_hdmi_set_gcp_infoframe(encoder)) + if (intel_hdmi_set_gcp_infoframe(encoder, crtc_state, conn_state)) val |= VIDEO_DIP_ENABLE_GCP_HSW; I915_WRITE(reg, val); POSTING_READ(reg); - intel_hdmi_set_avi_infoframe(encoder, adjusted_mode); - intel_hdmi_set_spd_infoframe(encoder); - intel_hdmi_set_hdmi_infoframe(encoder, adjusted_mode); + intel_hdmi_set_avi_infoframe(encoder, crtc_state); + intel_hdmi_set_spd_infoframe(encoder, crtc_state); + intel_hdmi_set_hdmi_infoframe(encoder, crtc_state); } void intel_dp_dual_mode_set_tmds_output(struct intel_hdmi *hdmi, bool enable) @@ -852,31 +851,32 @@ void intel_dp_dual_mode_set_tmds_output(struct intel_hdmi *hdmi, bool enable) adapter, enable); } -static void intel_hdmi_prepare(struct intel_encoder *encoder) +static void intel_hdmi_prepare(struct intel_encoder *encoder, + const struct intel_crtc_state *crtc_state) { struct drm_device *dev = encoder->base.dev; struct drm_i915_private *dev_priv = to_i915(dev); - struct intel_crtc *crtc = to_intel_crtc(encoder->base.crtc); + struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); struct intel_hdmi *intel_hdmi = enc_to_intel_hdmi(&encoder->base); - const struct drm_display_mode *adjusted_mode = &crtc->config->base.adjusted_mode; + const struct drm_display_mode *adjusted_mode = &crtc_state->base.adjusted_mode; u32 hdmi_val; intel_dp_dual_mode_set_tmds_output(intel_hdmi, true); hdmi_val = SDVO_ENCODING_HDMI; - if (!HAS_PCH_SPLIT(dev_priv) && crtc->config->limited_color_range) + if (!HAS_PCH_SPLIT(dev_priv) && crtc_state->limited_color_range) hdmi_val |= HDMI_COLOR_RANGE_16_235; if (adjusted_mode->flags & DRM_MODE_FLAG_PVSYNC) hdmi_val |= SDVO_VSYNC_ACTIVE_HIGH; if (adjusted_mode->flags & DRM_MODE_FLAG_PHSYNC) hdmi_val |= SDVO_HSYNC_ACTIVE_HIGH; - if (crtc->config->pipe_bpp > 24) + if (crtc_state->pipe_bpp > 24) hdmi_val |= HDMI_COLOR_FORMAT_12bpc; else hdmi_val |= SDVO_COLOR_FORMAT_8bpc; - if (crtc->config->has_hdmi_sink) + if (crtc_state->has_hdmi_sink) hdmi_val |= HDMI_MODE_SELECT_HDMI; if (HAS_PCH_CPT(dev_priv)) @@ -979,9 +979,9 @@ static void intel_enable_hdmi_audio(struct intel_encoder *encoder, struct intel_crtc_state *pipe_config, struct drm_connector_state *conn_state) { - struct intel_crtc *crtc = to_intel_crtc(encoder->base.crtc); + struct intel_crtc *crtc = to_intel_crtc(pipe_config->base.crtc); - WARN_ON(!crtc->config->has_hdmi_sink); + WARN_ON(!pipe_config->has_hdmi_sink); DRM_DEBUG_DRIVER("Enabling HDMI audio on pipe %c\n", pipe_name(crtc->pipe)); intel_audio_codec_enable(encoder, pipe_config, conn_state); @@ -1015,14 +1015,13 @@ static void ibx_enable_hdmi(struct intel_encoder *encoder, { struct drm_device *dev = encoder->base.dev; struct drm_i915_private *dev_priv = to_i915(dev); - struct intel_crtc *crtc = to_intel_crtc(encoder->base.crtc); struct intel_hdmi *intel_hdmi = enc_to_intel_hdmi(&encoder->base); u32 temp; temp = I915_READ(intel_hdmi->hdmi_reg); temp |= SDVO_ENABLE; - if (crtc->config->has_audio) + if (pipe_config->has_audio) temp |= SDVO_AUDIO_ENABLE; /* @@ -1066,7 +1065,7 @@ static void cpt_enable_hdmi(struct intel_encoder *encoder, { struct drm_device *dev = encoder->base.dev; struct drm_i915_private *dev_priv = to_i915(dev); - struct intel_crtc *crtc = to_intel_crtc(encoder->base.crtc); + struct intel_crtc *crtc = to_intel_crtc(pipe_config->base.crtc); struct intel_hdmi *intel_hdmi = enc_to_intel_hdmi(&encoder->base); enum pipe pipe = crtc->pipe; u32 temp; @@ -1128,7 +1127,7 @@ static void intel_disable_hdmi(struct intel_encoder *encoder, struct drm_device *dev = encoder->base.dev; struct drm_i915_private *dev_priv = to_i915(dev); struct intel_hdmi *intel_hdmi = enc_to_intel_hdmi(&encoder->base); - struct intel_crtc *crtc = to_intel_crtc(encoder->base.crtc); + struct intel_crtc *crtc = to_intel_crtc(old_crtc_state->base.crtc); u32 temp; temp = I915_READ(intel_hdmi->hdmi_reg); @@ -1170,7 +1169,7 @@ static void intel_disable_hdmi(struct intel_encoder *encoder, intel_set_pch_fifo_underrun_reporting(dev_priv, PIPE_A, true); } - intel_hdmi->set_infoframes(&encoder->base, false, NULL); + intel_hdmi->set_infoframes(&encoder->base, false, old_crtc_state, old_conn_state); intel_dp_dual_mode_set_tmds_output(intel_hdmi, false); } @@ -1642,13 +1641,12 @@ static void intel_hdmi_pre_enable(struct intel_encoder *encoder, struct drm_connector_state *conn_state) { struct intel_hdmi *intel_hdmi = enc_to_intel_hdmi(&encoder->base); - const struct drm_display_mode *adjusted_mode = &pipe_config->base.adjusted_mode; - intel_hdmi_prepare(encoder); + intel_hdmi_prepare(encoder, pipe_config); intel_hdmi->set_infoframes(&encoder->base, pipe_config->has_hdmi_sink, - adjusted_mode); + pipe_config, conn_state); } static void vlv_hdmi_pre_enable(struct intel_encoder *encoder, @@ -1659,7 +1657,6 @@ static void vlv_hdmi_pre_enable(struct intel_encoder *encoder, struct intel_hdmi *intel_hdmi = &dport->hdmi; struct drm_device *dev = encoder->base.dev; struct drm_i915_private *dev_priv = to_i915(dev); - const struct drm_display_mode *adjusted_mode = &pipe_config->base.adjusted_mode; vlv_phy_pre_encoder_enable(encoder); @@ -1669,7 +1666,7 @@ static void vlv_hdmi_pre_enable(struct intel_encoder *encoder, intel_hdmi->set_infoframes(&encoder->base, pipe_config->has_hdmi_sink, - adjusted_mode); + pipe_config, conn_state); g4x_enable_hdmi(encoder, pipe_config, conn_state); @@ -1680,7 +1677,7 @@ static void vlv_hdmi_pre_pll_enable(struct intel_encoder *encoder, struct intel_crtc_state *pipe_config, struct drm_connector_state *conn_state) { - intel_hdmi_prepare(encoder); + intel_hdmi_prepare(encoder, pipe_config); vlv_phy_pre_pll_enable(encoder); } @@ -1689,7 +1686,7 @@ static void chv_hdmi_pre_pll_enable(struct intel_encoder *encoder, struct intel_crtc_state *pipe_config, struct drm_connector_state *conn_state) { - intel_hdmi_prepare(encoder); + intel_hdmi_prepare(encoder, pipe_config); chv_phy_pre_pll_enable(encoder); } @@ -1732,9 +1729,6 @@ static void chv_hdmi_pre_enable(struct intel_encoder *encoder, struct intel_hdmi *intel_hdmi = &dport->hdmi; struct drm_device *dev = encoder->base.dev; struct drm_i915_private *dev_priv = to_i915(dev); - struct intel_crtc *intel_crtc = - to_intel_crtc(encoder->base.crtc); - const struct drm_display_mode *adjusted_mode = &intel_crtc->config->base.adjusted_mode; chv_phy_pre_encoder_enable(encoder); @@ -1743,8 +1737,8 @@ static void chv_hdmi_pre_enable(struct intel_encoder *encoder, chv_set_phy_signal_level(encoder, 128, 102, false); intel_hdmi->set_infoframes(&encoder->base, - intel_crtc->config->has_hdmi_sink, - adjusted_mode); + pipe_config->has_hdmi_sink, + pipe_config, conn_state); g4x_enable_hdmi(encoder, pipe_config, conn_state);
We can now obtain the relevant crtc_state/conn_state from the relevant callbacks, which means all the ->config accesses can be removed and the code cleaned up. Also fixes the following WARN_ON, because we don't have to iterate atomic connectors any more: [ 1562.981768] ------------[ cut here ]------------ [ 1562.981820] WARNING: CPU: 1 PID: 8667 at drivers/gpu/drm/i915/intel_hdmi.c:573 intel_hdmi_set_gcp_infoframe+0x225/0x230 [i915] [ 1562.981825] WARN_ON(!drm_modeset_is_locked(&dev->mode_config.connection_mutex)) [ 1562.981827] Modules linked in: [ 1562.981830] vgem coretemp crct10dif_pclmul crc32_pclmul snd_hda_codec_hdmi ghash_clmulni_intel snd_hda_codec_realtek snd_hda_codec_generic snd_hda_intel snd_hda_codec snd_hwdep snd_hda_core snd_pcm lpc_ich i2c_designware_platform i2c_designware_core i915 r8169 mii sdhci_acpi i2c_hid sdhci mmc_core [last unloaded: vgem] [ 1562.981874] CPU: 1 PID: 8667 Comm: kworker/u4:0 Tainted: G U 4.9.0-rc6-CI-CI_DRM_47+ #1 [ 1562.981925] Workqueue: events_unbound intel_atomic_commit_work [i915] [ 1562.981932] ffffc9000010faa0 ffffffff8142e415 ffffc9000010faf0 0000000000000000 [ 1562.981940] ffffc9000010fae0 ffffffff8107e5c6 0000023d81818282 ffff880130808008 [ 1562.981948] ffff8801308e8000 00000000001e1178 ffff88012f6a4548 ffff880130809068 [ 1562.981955] Call Trace: [ 1562.981963] [<ffffffff8142e415>] dump_stack+0x67/0x92 [ 1562.981969] [<ffffffff8107e5c6>] __warn+0xc6/0xe0 [ 1562.981974] [<ffffffff8107e62a>] warn_slowpath_fmt+0x4a/0x50 [ 1562.981980] [<ffffffff810ed6b0>] ? rcu_read_lock_sched_held+0x70/0x80 [ 1562.982025] [<ffffffffa0176cb5>] intel_hdmi_set_gcp_infoframe+0x225/0x230 [i915] [ 1562.982072] [<ffffffffa0178937>] vlv_set_infoframes+0xd7/0x1a0 [i915] [ 1562.982117] [<ffffffffa0177710>] vlv_hdmi_pre_enable+0x50/0x80 [i915] [ 1562.982164] [<ffffffffa0132f83>] intel_encoders_pre_enable.isra.9+0x63/0x80 [i915] [ 1562.982213] [<ffffffffa0144eac>] valleyview_crtc_enable+0xec/0x200 [i915] [ 1562.982258] [<ffffffffa01416f9>] intel_update_crtc+0x49/0xe0 [i915] [ 1562.982304] [<ffffffffa01417ee>] intel_update_crtcs+0x5e/0x80 [i915] [ 1562.982350] [<ffffffffa0141f26>] intel_atomic_commit_tail+0x316/0xfd0 [i915] [ 1562.982398] [<ffffffffa014314d>] intel_atomic_commit_work+0xd/0x10 [i915] [ 1562.982404] [<ffffffff8109c35c>] process_one_work+0x1ec/0x6b0 [ 1562.982408] [<ffffffff8109c2d6>] ? process_one_work+0x166/0x6b0 [ 1562.982413] [<ffffffff8109c869>] worker_thread+0x49/0x490 [ 1562.982432] [<ffffffff8109c820>] ? process_one_work+0x6b0/0x6b0 [ 1562.982436] [<ffffffff810a2b8b>] kthread+0xeb/0x110 [ 1562.982441] [<ffffffff810a2aa0>] ? kthread_park+0x60/0x60 [ 1562.982446] [<ffffffff81818ce7>] ret_from_fork+0x27/0x40 [ 1562.982450] ---[ end trace 7942c2355f036255 ]--- Testcase: kms_atomic_transition.1x-modeset-transitions-nonblocking Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>