From patchwork Mon Mar 21 13:50:34 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jani Nikula X-Patchwork-Id: 12787255 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id C9308C433F5 for ; Mon, 21 Mar 2022 13:51:25 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 3D43C10E33E; Mon, 21 Mar 2022 13:51:25 +0000 (UTC) Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) by gabe.freedesktop.org (Postfix) with ESMTPS id D6DBC10E33E for ; Mon, 21 Mar 2022 13:51:23 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1647870683; x=1679406683; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=LKOq3r+LGT3Fca7hFS3aCbI9MbOkyPs6/O6udhfdpbg=; b=P38INP7v6PJ0CBIFJLrYa9VOCWOxFNASQ2PTUWk+8oWN0kyC/prC1JtM OXGho5kN1YDrRwnEBLt7H1rvKU0lY0Zhi2g7N18vG8YYwqQtF76/e7iFl VKByZHErjg87xMTb2n2BjBSuIYCZdO49QjXRMQrRloAKM4AON9eC2x+CZ rnwMLTf/DU9cOkAqtd7m9UPoYbF1km/mg9IvNeiqvxkFZ7TKJAU4+Oju7 lsbwH2qFkAR4MsJuQMgAzPT17akqHk1ekALxdkTosSbnprnqN9kuNtAhY aIhT7fDYk3YVmWe7B85/530yI5nUK9IQ+fLIx8/ivt3M91/eVc+vMGabf g==; X-IronPort-AV: E=McAfee;i="6200,9189,10292"; a="245028229" X-IronPort-AV: E=Sophos;i="5.90,198,1643702400"; d="scan'208";a="245028229" Received: from orsmga002.jf.intel.com ([10.7.209.21]) by orsmga101.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 21 Mar 2022 06:51:23 -0700 X-IronPort-AV: E=Sophos;i="5.90,198,1643702400"; d="scan'208";a="514940374" Received: from abhijitc-mobl.gar.corp.intel.com (HELO localhost) ([10.252.34.12]) by orsmga002-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 21 Mar 2022 06:51:21 -0700 From: Jani Nikula To: intel-gfx@lists.freedesktop.org Date: Mon, 21 Mar 2022 15:50:34 +0200 Message-Id: X-Mailer: git-send-email 2.30.2 In-Reply-To: References: MIME-Version: 1.0 Organization: Intel Finland Oy - BIC 0357606-4 - Westendinkatu 7, 02160 Espoo Subject: [Intel-gfx] [PATCH v2 6/7] drm/i915/dmc: hide DMC version macros X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: jani.nikula@intel.com, Lucas De Marchi Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" The macros are now only needed within intel_dmc.c, so move them there. Signed-off-by: Jani Nikula Reviewed-by: Lucas De Marchi --- drivers/gpu/drm/i915/display/intel_dmc.c | 4 ++++ drivers/gpu/drm/i915/display/intel_dmc.h | 4 ---- 2 files changed, 4 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_dmc.c b/drivers/gpu/drm/i915/display/intel_dmc.c index f0eb3de8de60..a204b60a061f 100644 --- a/drivers/gpu/drm/i915/display/intel_dmc.c +++ b/drivers/gpu/drm/i915/display/intel_dmc.c @@ -37,6 +37,10 @@ * low-power state and comes back to normal. */ +#define DMC_VERSION(major, minor) ((major) << 16 | (minor)) +#define DMC_VERSION_MAJOR(version) ((version) >> 16) +#define DMC_VERSION_MINOR(version) ((version) & 0xffff) + #define DMC_PATH(platform, major, minor) \ "i915/" \ __stringify(platform) "_dmc_ver" \ diff --git a/drivers/gpu/drm/i915/display/intel_dmc.h b/drivers/gpu/drm/i915/display/intel_dmc.h index dd8880d2cbed..41091aee3b47 100644 --- a/drivers/gpu/drm/i915/display/intel_dmc.h +++ b/drivers/gpu/drm/i915/display/intel_dmc.h @@ -13,10 +13,6 @@ struct drm_i915_error_state_buf; struct drm_i915_private; -#define DMC_VERSION(major, minor) ((major) << 16 | (minor)) -#define DMC_VERSION_MAJOR(version) ((version) >> 16) -#define DMC_VERSION_MINOR(version) ((version) & 0xffff) - enum { DMC_FW_MAIN = 0, DMC_FW_PIPEA,