diff mbox series

[RFC,v0,06/13] drm/i915/mst: add helper independent of MST for figuring out the TU

Message ID ba87442b99f439c4ee544743f9ea8d77b88a1ce3.1734085515.git.jani.nikula@intel.com (mailing list archive)
State New
Headers show
Series drm/i915/dp: 128b/132b uncompressed SST | expand

Commit Message

Jani Nikula Dec. 13, 2024, 10:39 a.m. UTC 
Extract intel_dp_mtp_tu_compute_config() independent of MST for figuring
out the TU. Move the link configuration and mst state access to the
callers. This should be usable for 128b/132b SST as well.

The name isn't great, and it's all a bit too interconnected instead of
having more generic building blocks, but should do the job.

Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
 drivers/gpu/drm/i915/display/intel_dp_mst.c | 64 ++++++++++++++-------
 drivers/gpu/drm/i915/display/intel_dp_mst.h |  7 +++
 2 files changed, 50 insertions(+), 21 deletions(-)

Comments

Imre Deak Dec. 13, 2024, 6:44 p.m. UTC | #1 
On Fri, Dec 13, 2024 at 12:39:50PM +0200, Jani Nikula wrote:
> Extract intel_dp_mtp_tu_compute_config() independent of MST for figuring
> out the TU. Move the link configuration and mst state access to the
> callers. This should be usable for 128b/132b SST as well.
> 
> The name isn't great, and it's all a bit too interconnected instead of
> having more generic building blocks, but should do the job.
> 
> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_dp_mst.c | 64 ++++++++++++++-------
>  drivers/gpu/drm/i915/display/intel_dp_mst.h |  7 +++
>  2 files changed, 50 insertions(+), 21 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c b/drivers/gpu/drm/i915/display/intel_dp_mst.c
> index 5218b1f7679a..8ad42c757ddf 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp_mst.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c
> @@ -209,31 +209,23 @@ static int intel_dp_mst_dsc_get_slice_count(const struct intel_connector *connec
>  					    num_joined_pipes);
>  }
>  
> -static int mst_stream_find_vcpi_slots_for_bpp(struct intel_dp *intel_dp,
> -					      struct intel_crtc_state *crtc_state,
> -					      int max_bpp, int min_bpp,
> -					      struct link_config_limits *limits,
> -					      struct drm_connector_state *conn_state,
> -					      int step, bool dsc)
> +int intel_dp_mtp_tu_compute_config(struct intel_dp *intel_dp,
> +				   struct intel_crtc_state *crtc_state,
> +				   int max_bpp, int min_bpp,
> +				   struct drm_connector_state *conn_state,
> +				   int step, bool dsc)
>  {
>  	struct intel_display *display = to_intel_display(intel_dp);
>  	struct drm_atomic_state *state = crtc_state->uapi.state;
> -	struct drm_dp_mst_topology_state *mst_state;
>  	struct intel_connector *connector =
>  		to_intel_connector(conn_state->connector);
>  	const struct drm_display_mode *adjusted_mode =
>  		&crtc_state->hw.adjusted_mode;
> +	fixed20_12 pbn_div;
>  	int bpp, slots = -EINVAL;
>  	int dsc_slice_count = 0;
>  	int max_dpt_bpp;
>  
> -	mst_state = drm_atomic_get_mst_topology_state(state, &intel_dp->mst_mgr);
> -	if (IS_ERR(mst_state))
> -		return PTR_ERR(mst_state);
> -
> -	crtc_state->lane_count = limits->max_lane_count;
> -	crtc_state->port_clock = limits->max_rate;
> -
>  	if (dsc) {
>  		if (!intel_dp_supports_fec(intel_dp, connector, crtc_state))
>  			return -EINVAL;
> @@ -241,8 +233,8 @@ static int mst_stream_find_vcpi_slots_for_bpp(struct intel_dp *intel_dp,
>  		crtc_state->fec_enable = !intel_dp_is_uhbr(crtc_state);
>  	}
>  
> -	mst_state->pbn_div = drm_dp_get_vc_payload_bw(crtc_state->port_clock,
> -						      crtc_state->lane_count);
> +	pbn_div = drm_dp_get_vc_payload_bw(crtc_state->port_clock,
> +					   crtc_state->lane_count);
>  
>  	max_dpt_bpp = intel_dp_mst_max_dpt_bpp(crtc_state, dsc);
>  	if (max_bpp > max_dpt_bpp) {
> @@ -302,7 +294,7 @@ static int mst_stream_find_vcpi_slots_for_bpp(struct intel_dp *intel_dp,

In the SST case the TUs are calculated for the first - only - link, the
overhead for that tracked in local_bw_overhead (since we don't enable SSC). So
crtc_state->dp_m_n at this point contains already what's needed for SST,
except for the 4/lane_count alignment. The things calculated for remote
links - PBN, remote_tu - are not needed for SST, so the TUs for SST
could be aligned separately and all the MST specific bits below extracted
to an MST helper.

>  		pbn.full = dfixed_const(intel_dp_mst_calc_pbn(adjusted_mode->crtc_clock,
>  							      link_bpp_x16,
>  							      remote_bw_overhead));
> -		remote_tu = DIV_ROUND_UP(pbn.full, mst_state->pbn_div.full);
> +		remote_tu = DIV_ROUND_UP(pbn.full, pbn_div.full);
>  
>  		/*
>  		 * Aligning the TUs ensures that symbols consisting of multiple
> @@ -320,15 +312,20 @@ static int mst_stream_find_vcpi_slots_for_bpp(struct intel_dp *intel_dp,
>  		 * allocated for the whole path and the TUs allocated for the
>  		 * first branch device's link also applies here.
>  		 */
> -		pbn.full = remote_tu * mst_state->pbn_div.full;
> +		pbn.full = remote_tu * pbn_div.full;
>  		crtc_state->pbn = dfixed_trunc(pbn);

AFAICS crtc_state->pbn is not used anywhere else besides this function,
so could be removed from crtc_state while at it.

>  
>  		drm_WARN_ON(display->drm, remote_tu < crtc_state->dp_m_n.tu);
>  		crtc_state->dp_m_n.tu = remote_tu;
>  
> -		slots = drm_dp_atomic_find_time_slots(state, &intel_dp->mst_mgr,
> -						      connector->port,
> -						      crtc_state->pbn);
> +		if (intel_dp->is_mst)
> +			slots = drm_dp_atomic_find_time_slots(state, &intel_dp->mst_mgr,
> +							      connector->port,
> +							      crtc_state->pbn);
> +		else
> +			/* FIXME: cross-check against pbn_div? */
> +			slots = crtc_state->dp_m_n.tu;

The loop should be bounded like slots <= 64 then for SST (done by DRM
core in the MST helper above).

> +
>  		if (slots == -EDEADLK)
>  			return slots;
>  
> @@ -356,6 +353,31 @@ static int mst_stream_find_vcpi_slots_for_bpp(struct intel_dp *intel_dp,
>  	return 0;
>  }
>  
> +static int mst_stream_find_vcpi_slots_for_bpp(struct intel_dp *intel_dp,
> +					      struct intel_crtc_state *crtc_state,
> +					      int max_bpp, int min_bpp,
> +					      struct link_config_limits *limits,
> +					      struct drm_connector_state *conn_state,
> +					      int step, bool dsc)
> +{
> +	struct drm_atomic_state *state = crtc_state->uapi.state;
> +	struct drm_dp_mst_topology_state *mst_state;
> +
> +	mst_state = drm_atomic_get_mst_topology_state(state, &intel_dp->mst_mgr);
> +	if (IS_ERR(mst_state))
> +		return PTR_ERR(mst_state);
> +
> +	crtc_state->lane_count = limits->max_lane_count;
> +	crtc_state->port_clock = limits->max_rate;
> +
> +	mst_state->pbn_div = drm_dp_get_vc_payload_bw(crtc_state->port_clock,
> +						      crtc_state->lane_count);
> +
> +	return intel_dp_mtp_tu_compute_config(intel_dp, crtc_state,
> +					      max_bpp, min_bpp,
> +					      conn_state, step, dsc);
> +}
> +
>  static int mst_stream_compute_link_config(struct intel_dp *intel_dp,
>  					  struct intel_crtc_state *crtc_state,
>  					  struct drm_connector_state *conn_state,
> diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.h b/drivers/gpu/drm/i915/display/intel_dp_mst.h
> index 8343804ce3f8..c6bdc1d190a4 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp_mst.h
> +++ b/drivers/gpu/drm/i915/display/intel_dp_mst.h
> @@ -8,6 +8,7 @@
>  
>  #include <linux/types.h>
>  
> +struct drm_connector_state;
>  struct intel_atomic_state;
>  struct intel_crtc;
>  struct intel_crtc_state;
> @@ -30,4 +31,10 @@ bool intel_dp_mst_crtc_needs_modeset(struct intel_atomic_state *state,
>  void intel_dp_mst_prepare_probe(struct intel_dp *intel_dp);
>  bool intel_dp_mst_verify_dpcd_state(struct intel_dp *intel_dp);
>  
> +int intel_dp_mtp_tu_compute_config(struct intel_dp *intel_dp,
> +				   struct intel_crtc_state *crtc_state,
> +				   int max_bpp, int min_bpp,
> +				   struct drm_connector_state *conn_state,
> +				   int step, bool dsc);
> +
>  #endif /* __INTEL_DP_MST_H__ */
> -- 
> 2.39.5
>
diff mbox series

Patch

diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c b/drivers/gpu/drm/i915/display/intel_dp_mst.c
index 5218b1f7679a..8ad42c757ddf 100644
--- a/drivers/gpu/drm/i915/display/intel_dp_mst.c
+++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c
@@ -209,31 +209,23 @@  static int intel_dp_mst_dsc_get_slice_count(const struct intel_connector *connec
 					    num_joined_pipes);
 }
 
-static int mst_stream_find_vcpi_slots_for_bpp(struct intel_dp *intel_dp,
-					      struct intel_crtc_state *crtc_state,
-					      int max_bpp, int min_bpp,
-					      struct link_config_limits *limits,
-					      struct drm_connector_state *conn_state,
-					      int step, bool dsc)
+int intel_dp_mtp_tu_compute_config(struct intel_dp *intel_dp,
+				   struct intel_crtc_state *crtc_state,
+				   int max_bpp, int min_bpp,
+				   struct drm_connector_state *conn_state,
+				   int step, bool dsc)
 {
 	struct intel_display *display = to_intel_display(intel_dp);
 	struct drm_atomic_state *state = crtc_state->uapi.state;
-	struct drm_dp_mst_topology_state *mst_state;
 	struct intel_connector *connector =
 		to_intel_connector(conn_state->connector);
 	const struct drm_display_mode *adjusted_mode =
 		&crtc_state->hw.adjusted_mode;
+	fixed20_12 pbn_div;
 	int bpp, slots = -EINVAL;
 	int dsc_slice_count = 0;
 	int max_dpt_bpp;
 
-	mst_state = drm_atomic_get_mst_topology_state(state, &intel_dp->mst_mgr);
-	if (IS_ERR(mst_state))
-		return PTR_ERR(mst_state);
-
-	crtc_state->lane_count = limits->max_lane_count;
-	crtc_state->port_clock = limits->max_rate;
-
 	if (dsc) {
 		if (!intel_dp_supports_fec(intel_dp, connector, crtc_state))
 			return -EINVAL;
@@ -241,8 +233,8 @@  static int mst_stream_find_vcpi_slots_for_bpp(struct intel_dp *intel_dp,
 		crtc_state->fec_enable = !intel_dp_is_uhbr(crtc_state);
 	}
 
-	mst_state->pbn_div = drm_dp_get_vc_payload_bw(crtc_state->port_clock,
-						      crtc_state->lane_count);
+	pbn_div = drm_dp_get_vc_payload_bw(crtc_state->port_clock,
+					   crtc_state->lane_count);
 
 	max_dpt_bpp = intel_dp_mst_max_dpt_bpp(crtc_state, dsc);
 	if (max_bpp > max_dpt_bpp) {
@@ -302,7 +294,7 @@  static int mst_stream_find_vcpi_slots_for_bpp(struct intel_dp *intel_dp,
 		pbn.full = dfixed_const(intel_dp_mst_calc_pbn(adjusted_mode->crtc_clock,
 							      link_bpp_x16,
 							      remote_bw_overhead));
-		remote_tu = DIV_ROUND_UP(pbn.full, mst_state->pbn_div.full);
+		remote_tu = DIV_ROUND_UP(pbn.full, pbn_div.full);
 
 		/*
 		 * Aligning the TUs ensures that symbols consisting of multiple
@@ -320,15 +312,20 @@  static int mst_stream_find_vcpi_slots_for_bpp(struct intel_dp *intel_dp,
 		 * allocated for the whole path and the TUs allocated for the
 		 * first branch device's link also applies here.
 		 */
-		pbn.full = remote_tu * mst_state->pbn_div.full;
+		pbn.full = remote_tu * pbn_div.full;
 		crtc_state->pbn = dfixed_trunc(pbn);
 
 		drm_WARN_ON(display->drm, remote_tu < crtc_state->dp_m_n.tu);
 		crtc_state->dp_m_n.tu = remote_tu;
 
-		slots = drm_dp_atomic_find_time_slots(state, &intel_dp->mst_mgr,
-						      connector->port,
-						      crtc_state->pbn);
+		if (intel_dp->is_mst)
+			slots = drm_dp_atomic_find_time_slots(state, &intel_dp->mst_mgr,
+							      connector->port,
+							      crtc_state->pbn);
+		else
+			/* FIXME: cross-check against pbn_div? */
+			slots = crtc_state->dp_m_n.tu;
+
 		if (slots == -EDEADLK)
 			return slots;
 
@@ -356,6 +353,31 @@  static int mst_stream_find_vcpi_slots_for_bpp(struct intel_dp *intel_dp,
 	return 0;
 }
 
+static int mst_stream_find_vcpi_slots_for_bpp(struct intel_dp *intel_dp,
+					      struct intel_crtc_state *crtc_state,
+					      int max_bpp, int min_bpp,
+					      struct link_config_limits *limits,
+					      struct drm_connector_state *conn_state,
+					      int step, bool dsc)
+{
+	struct drm_atomic_state *state = crtc_state->uapi.state;
+	struct drm_dp_mst_topology_state *mst_state;
+
+	mst_state = drm_atomic_get_mst_topology_state(state, &intel_dp->mst_mgr);
+	if (IS_ERR(mst_state))
+		return PTR_ERR(mst_state);
+
+	crtc_state->lane_count = limits->max_lane_count;
+	crtc_state->port_clock = limits->max_rate;
+
+	mst_state->pbn_div = drm_dp_get_vc_payload_bw(crtc_state->port_clock,
+						      crtc_state->lane_count);
+
+	return intel_dp_mtp_tu_compute_config(intel_dp, crtc_state,
+					      max_bpp, min_bpp,
+					      conn_state, step, dsc);
+}
+
 static int mst_stream_compute_link_config(struct intel_dp *intel_dp,
 					  struct intel_crtc_state *crtc_state,
 					  struct drm_connector_state *conn_state,
diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.h b/drivers/gpu/drm/i915/display/intel_dp_mst.h
index 8343804ce3f8..c6bdc1d190a4 100644
--- a/drivers/gpu/drm/i915/display/intel_dp_mst.h
+++ b/drivers/gpu/drm/i915/display/intel_dp_mst.h
@@ -8,6 +8,7 @@ 
 
 #include <linux/types.h>
 
+struct drm_connector_state;
 struct intel_atomic_state;
 struct intel_crtc;
 struct intel_crtc_state;
@@ -30,4 +31,10 @@  bool intel_dp_mst_crtc_needs_modeset(struct intel_atomic_state *state,
 void intel_dp_mst_prepare_probe(struct intel_dp *intel_dp);
 bool intel_dp_mst_verify_dpcd_state(struct intel_dp *intel_dp);
 
+int intel_dp_mtp_tu_compute_config(struct intel_dp *intel_dp,
+				   struct intel_crtc_state *crtc_state,
+				   int max_bpp, int min_bpp,
+				   struct drm_connector_state *conn_state,
+				   int step, bool dsc);
+
 #endif /* __INTEL_DP_MST_H__ */