diff mbox series

[v2,1/2] drm/xe/compat: refactor compat i915_drv.h

Message ID d6bd95bf52aa37f48ddec3e675b7a3cc66829eef.1741192597.git.jani.nikula@intel.com (mailing list archive)
State New
Headers show
Series drm/xe/compat: cleanup | expand

Commit Message

Jani Nikula March 5, 2025, 4:38 p.m. UTC
The compat i915_drv.h contains things that aren't there in the original
i915_drv.h. Split out gem/i915_gem_object.h and i915_scheduler_types.h,
moving the corresponding pieces out, including FORCEWAKE_ALL to
intel_uncore.h.

Technically I915_PRIORITY_DISPLAY should be in i915_priolist_types.h,
but it's a bit overkill to split out another file just for
that. i915_scheduler_types.h shall do.

With this, the compat i915_drv.h becomes a strict subset of the
original.

Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
 drivers/gpu/drm/i915/display/intel_atomic_plane.c |  2 ++
 .../xe/compat-i915-headers/gem/i915_gem_object.h  | 15 +++++++++++++++
 drivers/gpu/drm/xe/compat-i915-headers/i915_drv.h |  8 --------
 .../xe/compat-i915-headers/i915_scheduler_types.h | 13 +++++++++++++
 .../gpu/drm/xe/compat-i915-headers/intel_uncore.h |  2 ++
 5 files changed, 32 insertions(+), 8 deletions(-)
 create mode 100644 drivers/gpu/drm/xe/compat-i915-headers/gem/i915_gem_object.h
 create mode 100644 drivers/gpu/drm/xe/compat-i915-headers/i915_scheduler_types.h

Comments

Garg, Nemesa March 6, 2025, 7:09 a.m. UTC | #1
> -----Original Message-----
> From: Intel-gfx <intel-gfx-bounces@lists.freedesktop.org> On Behalf Of Jani
> Nikula
> Sent: Wednesday, March 5, 2025 10:08 PM
> To: intel-gfx@lists.freedesktop.org
> Cc: intel-xe@lists.freedesktop.org; Nikula, Jani <jani.nikula@intel.com>; Vivi,
> Rodrigo <rodrigo.vivi@intel.com>
> Subject: [PATCH v2 1/2] drm/xe/compat: refactor compat i915_drv.h
> 
> The compat i915_drv.h contains things that aren't there in the original
> i915_drv.h. Split out gem/i915_gem_object.h and i915_scheduler_types.h,
> moving the corresponding pieces out, including FORCEWAKE_ALL to
> intel_uncore.h.
> 
> Technically I915_PRIORITY_DISPLAY should be in i915_priolist_types.h, but it's
> a bit overkill to split out another file just for that. i915_scheduler_types.h
> shall do.
> 
> With this, the compat i915_drv.h becomes a strict subset of the original.
> 
> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_atomic_plane.c |  2 ++  .../xe/compat-
> i915-headers/gem/i915_gem_object.h  | 15 +++++++++++++++
> drivers/gpu/drm/xe/compat-i915-headers/i915_drv.h |  8 --------
> .../xe/compat-i915-headers/i915_scheduler_types.h | 13 +++++++++++++
> .../gpu/drm/xe/compat-i915-headers/intel_uncore.h |  2 ++
>  5 files changed, 32 insertions(+), 8 deletions(-)  create mode 100644
> drivers/gpu/drm/xe/compat-i915-headers/gem/i915_gem_object.h
>  create mode 100644 drivers/gpu/drm/xe/compat-i915-
> headers/i915_scheduler_types.h
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_atomic_plane.c
> b/drivers/gpu/drm/i915/display/intel_atomic_plane.c
> index a26b54185d5b..d899c37d80c6 100644
> --- a/drivers/gpu/drm/i915/display/intel_atomic_plane.c
> +++ b/drivers/gpu/drm/i915/display/intel_atomic_plane.c
> @@ -41,8 +41,10 @@
>  #include <drm/drm_gem.h>
>  #include <drm/drm_gem_atomic_helper.h>
> 
> +#include "gem/i915_gem_object.h"
>  #include "i915_config.h"
>  #include "i915_drv.h"
> +#include "i915_scheduler_types.h"
>  #include "i915_vma.h"
>  #include "i9xx_plane_regs.h"
>  #include "intel_atomic_plane.h"
> diff --git a/drivers/gpu/drm/xe/compat-i915-headers/gem/i915_gem_object.h
> b/drivers/gpu/drm/xe/compat-i915-headers/gem/i915_gem_object.h
> new file mode 100644
> index 000000000000..03f35dce7b93
> --- /dev/null
> +++ b/drivers/gpu/drm/xe/compat-i915-headers/gem/i915_gem_object.h
> @@ -0,0 +1,15 @@
> +/* SPDX-License-Identifier: MIT */
> +/* Copyright © 2025 Intel Corporation */
> +
> +#ifndef __I915_GEM_OBJECT_H__
> +#define __i915_GEM_OBJECT_H__
> +
> +struct dma_fence;
> +struct i915_sched_attr;
> +
> +static inline void i915_gem_fence_wait_priority(struct dma_fence *fence,
> +						const struct i915_sched_attr
> *attr) { }
> +
> +#endif
> diff --git a/drivers/gpu/drm/xe/compat-i915-headers/i915_drv.h
> b/drivers/gpu/drm/xe/compat-i915-headers/i915_drv.h
> index 84b0991b35b3..dfec5108d2c3 100644
> --- a/drivers/gpu/drm/xe/compat-i915-headers/i915_drv.h
> +++ b/drivers/gpu/drm/xe/compat-i915-headers/i915_drv.h
> @@ -95,14 +95,6 @@ static inline struct drm_i915_private *to_i915(const
> struct drm_device *dev)
> 
>  #define HAS_128_BYTE_Y_TILING(xe) (xe || 1)
> 
> -#define I915_PRIORITY_DISPLAY 0
> -struct i915_sched_attr {
> -	int priority;
> -};
> -#define i915_gem_fence_wait_priority(fence, attr) do { (void) attr; } while (0)
> -
> -#define FORCEWAKE_ALL XE_FORCEWAKE_ALL
> -
>  #ifdef CONFIG_ARM64
>  /*
>   * arm64 indirectly includes linux/rtc.h, diff --git
> a/drivers/gpu/drm/xe/compat-i915-headers/i915_scheduler_types.h
> b/drivers/gpu/drm/xe/compat-i915-headers/i915_scheduler_types.h
> new file mode 100644
> index 000000000000..c11130440d31
> --- /dev/null
> +++ b/drivers/gpu/drm/xe/compat-i915-headers/i915_scheduler_types.h
> @@ -0,0 +1,13 @@
> +/* SPDX-License-Identifier: MIT */
> +/* Copyright © 2025 Intel Corporation */
> +
> +#ifndef __I915_SCHEDULER_TYPES_H__
> +#define __I915_SCHEDULER_TYPES_H__
> +
> +#define I915_PRIORITY_DISPLAY 0
> +
> +struct i915_sched_attr {
> +	int priority;
> +};
> +
> +#endif
> diff --git a/drivers/gpu/drm/xe/compat-i915-headers/intel_uncore.h
> b/drivers/gpu/drm/xe/compat-i915-headers/intel_uncore.h
> index 4fc3e535de91..0c1e88e36a1e 100644
> --- a/drivers/gpu/drm/xe/compat-i915-headers/intel_uncore.h
> +++ b/drivers/gpu/drm/xe/compat-i915-headers/intel_uncore.h
> @@ -10,6 +10,8 @@
>  #include "xe_device_types.h"
>  #include "xe_mmio.h"
> 
> +#define FORCEWAKE_ALL XE_FORCEWAKE_ALL
> +
>  static inline struct intel_uncore *to_intel_uncore(struct drm_device *drm)  {
>  	return &to_xe_device(drm)->uncore;
> --
LGTM,
Reviewed-by: Nemesa Garg <nemesa.garg@intel.com>
> 2.39.5
Jani Nikula March 7, 2025, 11:30 a.m. UTC | #2
On Thu, 06 Mar 2025, "Garg, Nemesa" <nemesa.garg@intel.com> wrote:
>> -----Original Message-----
>> From: Intel-gfx <intel-gfx-bounces@lists.freedesktop.org> On Behalf Of Jani
>> Nikula
>> @@ -0,0 +1,15 @@
>> +/* SPDX-License-Identifier: MIT */
>> +/* Copyright © 2025 Intel Corporation */
>> +
>> +#ifndef __I915_GEM_OBJECT_H__
>> +#define __i915_GEM_OBJECT_H__

Exceptionally, I took the liberty of fixing this while applying.

It was pure luck that I caught it with clang's -Wheader-guard [1].

[1] https://clang.llvm.org/docs/DiagnosticsReference.html#wheader-guard

> Reviewed-by: Nemesa Garg <nemesa.garg@intel.com>

Thanks for the review, series pushed to din.

BR,
Jani.
diff mbox series

Patch

diff --git a/drivers/gpu/drm/i915/display/intel_atomic_plane.c b/drivers/gpu/drm/i915/display/intel_atomic_plane.c
index a26b54185d5b..d899c37d80c6 100644
--- a/drivers/gpu/drm/i915/display/intel_atomic_plane.c
+++ b/drivers/gpu/drm/i915/display/intel_atomic_plane.c
@@ -41,8 +41,10 @@ 
 #include <drm/drm_gem.h>
 #include <drm/drm_gem_atomic_helper.h>
 
+#include "gem/i915_gem_object.h"
 #include "i915_config.h"
 #include "i915_drv.h"
+#include "i915_scheduler_types.h"
 #include "i915_vma.h"
 #include "i9xx_plane_regs.h"
 #include "intel_atomic_plane.h"
diff --git a/drivers/gpu/drm/xe/compat-i915-headers/gem/i915_gem_object.h b/drivers/gpu/drm/xe/compat-i915-headers/gem/i915_gem_object.h
new file mode 100644
index 000000000000..03f35dce7b93
--- /dev/null
+++ b/drivers/gpu/drm/xe/compat-i915-headers/gem/i915_gem_object.h
@@ -0,0 +1,15 @@ 
+/* SPDX-License-Identifier: MIT */
+/* Copyright © 2025 Intel Corporation */
+
+#ifndef __I915_GEM_OBJECT_H__
+#define __i915_GEM_OBJECT_H__
+
+struct dma_fence;
+struct i915_sched_attr;
+
+static inline void i915_gem_fence_wait_priority(struct dma_fence *fence,
+						const struct i915_sched_attr *attr)
+{
+}
+
+#endif
diff --git a/drivers/gpu/drm/xe/compat-i915-headers/i915_drv.h b/drivers/gpu/drm/xe/compat-i915-headers/i915_drv.h
index 84b0991b35b3..dfec5108d2c3 100644
--- a/drivers/gpu/drm/xe/compat-i915-headers/i915_drv.h
+++ b/drivers/gpu/drm/xe/compat-i915-headers/i915_drv.h
@@ -95,14 +95,6 @@  static inline struct drm_i915_private *to_i915(const struct drm_device *dev)
 
 #define HAS_128_BYTE_Y_TILING(xe) (xe || 1)
 
-#define I915_PRIORITY_DISPLAY 0
-struct i915_sched_attr {
-	int priority;
-};
-#define i915_gem_fence_wait_priority(fence, attr) do { (void) attr; } while (0)
-
-#define FORCEWAKE_ALL XE_FORCEWAKE_ALL
-
 #ifdef CONFIG_ARM64
 /*
  * arm64 indirectly includes linux/rtc.h,
diff --git a/drivers/gpu/drm/xe/compat-i915-headers/i915_scheduler_types.h b/drivers/gpu/drm/xe/compat-i915-headers/i915_scheduler_types.h
new file mode 100644
index 000000000000..c11130440d31
--- /dev/null
+++ b/drivers/gpu/drm/xe/compat-i915-headers/i915_scheduler_types.h
@@ -0,0 +1,13 @@ 
+/* SPDX-License-Identifier: MIT */
+/* Copyright © 2025 Intel Corporation */
+
+#ifndef __I915_SCHEDULER_TYPES_H__
+#define __I915_SCHEDULER_TYPES_H__
+
+#define I915_PRIORITY_DISPLAY 0
+
+struct i915_sched_attr {
+	int priority;
+};
+
+#endif
diff --git a/drivers/gpu/drm/xe/compat-i915-headers/intel_uncore.h b/drivers/gpu/drm/xe/compat-i915-headers/intel_uncore.h
index 4fc3e535de91..0c1e88e36a1e 100644
--- a/drivers/gpu/drm/xe/compat-i915-headers/intel_uncore.h
+++ b/drivers/gpu/drm/xe/compat-i915-headers/intel_uncore.h
@@ -10,6 +10,8 @@ 
 #include "xe_device_types.h"
 #include "xe_mmio.h"
 
+#define FORCEWAKE_ALL XE_FORCEWAKE_ALL
+
 static inline struct intel_uncore *to_intel_uncore(struct drm_device *drm)
 {
 	return &to_xe_device(drm)->uncore;