Message ID | df61cd56f11628e7b806f0d862e5183002950d85.1736332802.git.jani.nikula@intel.com (mailing list archive) |
---|---|
State | New |
Headers | show |
Series | drm/i915: display reset cleanups | expand |
On Wed, Jan 08, 2025 at 12:41:17PM +0200, Jani Nikula wrote: > pending_fb_pin is more about display than GPU reset. Move it to struct > intel_display. The restore sub-struct already contains reset related > members, so move it there. > > Signed-off-by: Jani Nikula <jani.nikula@intel.com> Reviewed-by: Matt Roper <matthew.d.roper@intel.com> > --- > drivers/gpu/drm/i915/display/intel_display_core.h | 2 ++ > drivers/gpu/drm/i915/display/intel_display_reset.c | 2 +- > drivers/gpu/drm/i915/display/intel_dpt.c | 5 +++-- > drivers/gpu/drm/i915/display/intel_fb_pin.c | 10 ++++++---- > drivers/gpu/drm/i915/display/intel_overlay.c | 5 ++--- > drivers/gpu/drm/i915/i915_gpu_error.h | 2 -- > 6 files changed, 14 insertions(+), 12 deletions(-) > > diff --git a/drivers/gpu/drm/i915/display/intel_display_core.h b/drivers/gpu/drm/i915/display/intel_display_core.h > index 554870d2494b..1970d4c15090 100644 > --- a/drivers/gpu/drm/i915/display/intel_display_core.h > +++ b/drivers/gpu/drm/i915/display/intel_display_core.h > @@ -512,6 +512,8 @@ struct intel_display { > /* restore state for suspend/resume and display reset */ > struct drm_atomic_state *modeset_state; > struct drm_modeset_acquire_ctx reset_ctx; > + /* modeset stuck tracking for reset */ > + atomic_t pending_fb_pin; > u32 saveDSPARB; > u32 saveSWF0[16]; > u32 saveSWF1[16]; > diff --git a/drivers/gpu/drm/i915/display/intel_display_reset.c b/drivers/gpu/drm/i915/display/intel_display_reset.c > index 3da70bdbd9f6..1e6421d51c51 100644 > --- a/drivers/gpu/drm/i915/display/intel_display_reset.c > +++ b/drivers/gpu/drm/i915/display/intel_display_reset.c > @@ -41,7 +41,7 @@ void intel_display_reset_prepare(struct intel_display *display) > smp_mb__after_atomic(); > wake_up_bit(&to_gt(dev_priv)->reset.flags, I915_RESET_MODESET); > > - if (atomic_read(&dev_priv->gpu_error.pending_fb_pin)) { > + if (atomic_read(&display->restore.pending_fb_pin)) { > drm_dbg_kms(display->drm, > "Modeset potentially stuck, unbreaking through wedging\n"); > intel_gt_set_wedged(to_gt(dev_priv)); > diff --git a/drivers/gpu/drm/i915/display/intel_dpt.c b/drivers/gpu/drm/i915/display/intel_dpt.c > index 8b1f0e92a11c..8254e8a2b82c 100644 > --- a/drivers/gpu/drm/i915/display/intel_dpt.c > +++ b/drivers/gpu/drm/i915/display/intel_dpt.c > @@ -125,6 +125,7 @@ struct i915_vma *intel_dpt_pin_to_ggtt(struct i915_address_space *vm, > unsigned int alignment) > { > struct drm_i915_private *i915 = vm->i915; > + struct intel_display *display = &i915->display; > struct i915_dpt *dpt = i915_vm_to_dpt(vm); > intel_wakeref_t wakeref; > struct i915_vma *vma; > @@ -137,7 +138,7 @@ struct i915_vma *intel_dpt_pin_to_ggtt(struct i915_address_space *vm, > pin_flags |= PIN_MAPPABLE; > > wakeref = intel_runtime_pm_get(&i915->runtime_pm); > - atomic_inc(&i915->gpu_error.pending_fb_pin); > + atomic_inc(&display->restore.pending_fb_pin); > > for_i915_gem_ww(&ww, err, true) { > err = i915_gem_object_lock(dpt->obj, &ww); > @@ -167,7 +168,7 @@ struct i915_vma *intel_dpt_pin_to_ggtt(struct i915_address_space *vm, > > dpt->obj->mm.dirty = true; > > - atomic_dec(&i915->gpu_error.pending_fb_pin); > + atomic_dec(&display->restore.pending_fb_pin); > intel_runtime_pm_put(&i915->runtime_pm, wakeref); > > return err ? ERR_PTR(err) : vma; > diff --git a/drivers/gpu/drm/i915/display/intel_fb_pin.c b/drivers/gpu/drm/i915/display/intel_fb_pin.c > index d3a86f9c6bc8..ff5efd4544e3 100644 > --- a/drivers/gpu/drm/i915/display/intel_fb_pin.c > +++ b/drivers/gpu/drm/i915/display/intel_fb_pin.c > @@ -25,6 +25,7 @@ intel_fb_pin_to_dpt(const struct drm_framebuffer *fb, > struct i915_address_space *vm) > { > struct drm_device *dev = fb->dev; > + struct intel_display *display = to_intel_display(dev); > struct drm_i915_private *dev_priv = to_i915(dev); > struct drm_gem_object *_obj = intel_fb_bo(fb); > struct drm_i915_gem_object *obj = to_intel_bo(_obj); > @@ -42,7 +43,7 @@ intel_fb_pin_to_dpt(const struct drm_framebuffer *fb, > if (WARN_ON(!i915_gem_object_is_framebuffer(obj))) > return ERR_PTR(-EINVAL); > > - atomic_inc(&dev_priv->gpu_error.pending_fb_pin); > + atomic_inc(&display->restore.pending_fb_pin); > > for_i915_gem_ww(&ww, ret, true) { > ret = i915_gem_object_lock(obj, &ww); > @@ -97,7 +98,7 @@ intel_fb_pin_to_dpt(const struct drm_framebuffer *fb, > > i915_vma_get(vma); > err: > - atomic_dec(&dev_priv->gpu_error.pending_fb_pin); > + atomic_dec(&display->restore.pending_fb_pin); > > return vma; > } > @@ -111,6 +112,7 @@ intel_fb_pin_to_ggtt(const struct drm_framebuffer *fb, > unsigned long *out_flags) > { > struct drm_device *dev = fb->dev; > + struct intel_display *display = to_intel_display(dev); > struct drm_i915_private *dev_priv = to_i915(dev); > struct drm_gem_object *_obj = intel_fb_bo(fb); > struct drm_i915_gem_object *obj = to_intel_bo(_obj); > @@ -143,7 +145,7 @@ intel_fb_pin_to_ggtt(const struct drm_framebuffer *fb, > */ > wakeref = intel_runtime_pm_get(&dev_priv->runtime_pm); > > - atomic_inc(&dev_priv->gpu_error.pending_fb_pin); > + atomic_inc(&display->restore.pending_fb_pin); > > /* > * Valleyview is definitely limited to scanning out the first > @@ -219,7 +221,7 @@ intel_fb_pin_to_ggtt(const struct drm_framebuffer *fb, > if (ret) > vma = ERR_PTR(ret); > > - atomic_dec(&dev_priv->gpu_error.pending_fb_pin); > + atomic_dec(&display->restore.pending_fb_pin); > intel_runtime_pm_put(&dev_priv->runtime_pm, wakeref); > return vma; > } > diff --git a/drivers/gpu/drm/i915/display/intel_overlay.c b/drivers/gpu/drm/i915/display/intel_overlay.c > index ca30fff61876..60ae5e3bc454 100644 > --- a/drivers/gpu/drm/i915/display/intel_overlay.c > +++ b/drivers/gpu/drm/i915/display/intel_overlay.c > @@ -793,7 +793,6 @@ static int intel_overlay_do_put_image(struct intel_overlay *overlay, > struct drm_intel_overlay_put_image *params) > { > struct intel_display *display = overlay->display; > - struct drm_i915_private *dev_priv = to_i915(display->drm); > struct overlay_registers __iomem *regs = overlay->regs; > u32 swidth, swidthsw, sheight, ostride; > enum pipe pipe = overlay->crtc->pipe; > @@ -808,7 +807,7 @@ static int intel_overlay_do_put_image(struct intel_overlay *overlay, > if (ret != 0) > return ret; > > - atomic_inc(&dev_priv->gpu_error.pending_fb_pin); > + atomic_inc(&display->restore.pending_fb_pin); > > vma = intel_overlay_pin_fb(new_bo); > if (IS_ERR(vma)) { > @@ -896,7 +895,7 @@ static int intel_overlay_do_put_image(struct intel_overlay *overlay, > out_unpin: > i915_vma_unpin(vma); > out_pin_section: > - atomic_dec(&dev_priv->gpu_error.pending_fb_pin); > + atomic_dec(&display->restore.pending_fb_pin); > > return ret; > } > diff --git a/drivers/gpu/drm/i915/i915_gpu_error.h b/drivers/gpu/drm/i915/i915_gpu_error.h > index 78a8928562a9..749e1c55613e 100644 > --- a/drivers/gpu/drm/i915/i915_gpu_error.h > +++ b/drivers/gpu/drm/i915/i915_gpu_error.h > @@ -224,8 +224,6 @@ struct i915_gpu_error { > /* Protected by the above dev->gpu_error.lock. */ > struct i915_gpu_coredump *first_error; > > - atomic_t pending_fb_pin; > - > /** Number of times the device has been reset (global) */ > atomic_t reset_count; > > -- > 2.39.5 >
diff --git a/drivers/gpu/drm/i915/display/intel_display_core.h b/drivers/gpu/drm/i915/display/intel_display_core.h index 554870d2494b..1970d4c15090 100644 --- a/drivers/gpu/drm/i915/display/intel_display_core.h +++ b/drivers/gpu/drm/i915/display/intel_display_core.h @@ -512,6 +512,8 @@ struct intel_display { /* restore state for suspend/resume and display reset */ struct drm_atomic_state *modeset_state; struct drm_modeset_acquire_ctx reset_ctx; + /* modeset stuck tracking for reset */ + atomic_t pending_fb_pin; u32 saveDSPARB; u32 saveSWF0[16]; u32 saveSWF1[16]; diff --git a/drivers/gpu/drm/i915/display/intel_display_reset.c b/drivers/gpu/drm/i915/display/intel_display_reset.c index 3da70bdbd9f6..1e6421d51c51 100644 --- a/drivers/gpu/drm/i915/display/intel_display_reset.c +++ b/drivers/gpu/drm/i915/display/intel_display_reset.c @@ -41,7 +41,7 @@ void intel_display_reset_prepare(struct intel_display *display) smp_mb__after_atomic(); wake_up_bit(&to_gt(dev_priv)->reset.flags, I915_RESET_MODESET); - if (atomic_read(&dev_priv->gpu_error.pending_fb_pin)) { + if (atomic_read(&display->restore.pending_fb_pin)) { drm_dbg_kms(display->drm, "Modeset potentially stuck, unbreaking through wedging\n"); intel_gt_set_wedged(to_gt(dev_priv)); diff --git a/drivers/gpu/drm/i915/display/intel_dpt.c b/drivers/gpu/drm/i915/display/intel_dpt.c index 8b1f0e92a11c..8254e8a2b82c 100644 --- a/drivers/gpu/drm/i915/display/intel_dpt.c +++ b/drivers/gpu/drm/i915/display/intel_dpt.c @@ -125,6 +125,7 @@ struct i915_vma *intel_dpt_pin_to_ggtt(struct i915_address_space *vm, unsigned int alignment) { struct drm_i915_private *i915 = vm->i915; + struct intel_display *display = &i915->display; struct i915_dpt *dpt = i915_vm_to_dpt(vm); intel_wakeref_t wakeref; struct i915_vma *vma; @@ -137,7 +138,7 @@ struct i915_vma *intel_dpt_pin_to_ggtt(struct i915_address_space *vm, pin_flags |= PIN_MAPPABLE; wakeref = intel_runtime_pm_get(&i915->runtime_pm); - atomic_inc(&i915->gpu_error.pending_fb_pin); + atomic_inc(&display->restore.pending_fb_pin); for_i915_gem_ww(&ww, err, true) { err = i915_gem_object_lock(dpt->obj, &ww); @@ -167,7 +168,7 @@ struct i915_vma *intel_dpt_pin_to_ggtt(struct i915_address_space *vm, dpt->obj->mm.dirty = true; - atomic_dec(&i915->gpu_error.pending_fb_pin); + atomic_dec(&display->restore.pending_fb_pin); intel_runtime_pm_put(&i915->runtime_pm, wakeref); return err ? ERR_PTR(err) : vma; diff --git a/drivers/gpu/drm/i915/display/intel_fb_pin.c b/drivers/gpu/drm/i915/display/intel_fb_pin.c index d3a86f9c6bc8..ff5efd4544e3 100644 --- a/drivers/gpu/drm/i915/display/intel_fb_pin.c +++ b/drivers/gpu/drm/i915/display/intel_fb_pin.c @@ -25,6 +25,7 @@ intel_fb_pin_to_dpt(const struct drm_framebuffer *fb, struct i915_address_space *vm) { struct drm_device *dev = fb->dev; + struct intel_display *display = to_intel_display(dev); struct drm_i915_private *dev_priv = to_i915(dev); struct drm_gem_object *_obj = intel_fb_bo(fb); struct drm_i915_gem_object *obj = to_intel_bo(_obj); @@ -42,7 +43,7 @@ intel_fb_pin_to_dpt(const struct drm_framebuffer *fb, if (WARN_ON(!i915_gem_object_is_framebuffer(obj))) return ERR_PTR(-EINVAL); - atomic_inc(&dev_priv->gpu_error.pending_fb_pin); + atomic_inc(&display->restore.pending_fb_pin); for_i915_gem_ww(&ww, ret, true) { ret = i915_gem_object_lock(obj, &ww); @@ -97,7 +98,7 @@ intel_fb_pin_to_dpt(const struct drm_framebuffer *fb, i915_vma_get(vma); err: - atomic_dec(&dev_priv->gpu_error.pending_fb_pin); + atomic_dec(&display->restore.pending_fb_pin); return vma; } @@ -111,6 +112,7 @@ intel_fb_pin_to_ggtt(const struct drm_framebuffer *fb, unsigned long *out_flags) { struct drm_device *dev = fb->dev; + struct intel_display *display = to_intel_display(dev); struct drm_i915_private *dev_priv = to_i915(dev); struct drm_gem_object *_obj = intel_fb_bo(fb); struct drm_i915_gem_object *obj = to_intel_bo(_obj); @@ -143,7 +145,7 @@ intel_fb_pin_to_ggtt(const struct drm_framebuffer *fb, */ wakeref = intel_runtime_pm_get(&dev_priv->runtime_pm); - atomic_inc(&dev_priv->gpu_error.pending_fb_pin); + atomic_inc(&display->restore.pending_fb_pin); /* * Valleyview is definitely limited to scanning out the first @@ -219,7 +221,7 @@ intel_fb_pin_to_ggtt(const struct drm_framebuffer *fb, if (ret) vma = ERR_PTR(ret); - atomic_dec(&dev_priv->gpu_error.pending_fb_pin); + atomic_dec(&display->restore.pending_fb_pin); intel_runtime_pm_put(&dev_priv->runtime_pm, wakeref); return vma; } diff --git a/drivers/gpu/drm/i915/display/intel_overlay.c b/drivers/gpu/drm/i915/display/intel_overlay.c index ca30fff61876..60ae5e3bc454 100644 --- a/drivers/gpu/drm/i915/display/intel_overlay.c +++ b/drivers/gpu/drm/i915/display/intel_overlay.c @@ -793,7 +793,6 @@ static int intel_overlay_do_put_image(struct intel_overlay *overlay, struct drm_intel_overlay_put_image *params) { struct intel_display *display = overlay->display; - struct drm_i915_private *dev_priv = to_i915(display->drm); struct overlay_registers __iomem *regs = overlay->regs; u32 swidth, swidthsw, sheight, ostride; enum pipe pipe = overlay->crtc->pipe; @@ -808,7 +807,7 @@ static int intel_overlay_do_put_image(struct intel_overlay *overlay, if (ret != 0) return ret; - atomic_inc(&dev_priv->gpu_error.pending_fb_pin); + atomic_inc(&display->restore.pending_fb_pin); vma = intel_overlay_pin_fb(new_bo); if (IS_ERR(vma)) { @@ -896,7 +895,7 @@ static int intel_overlay_do_put_image(struct intel_overlay *overlay, out_unpin: i915_vma_unpin(vma); out_pin_section: - atomic_dec(&dev_priv->gpu_error.pending_fb_pin); + atomic_dec(&display->restore.pending_fb_pin); return ret; } diff --git a/drivers/gpu/drm/i915/i915_gpu_error.h b/drivers/gpu/drm/i915/i915_gpu_error.h index 78a8928562a9..749e1c55613e 100644 --- a/drivers/gpu/drm/i915/i915_gpu_error.h +++ b/drivers/gpu/drm/i915/i915_gpu_error.h @@ -224,8 +224,6 @@ struct i915_gpu_error { /* Protected by the above dev->gpu_error.lock. */ struct i915_gpu_coredump *first_error; - atomic_t pending_fb_pin; - /** Number of times the device has been reset (global) */ atomic_t reset_count;
pending_fb_pin is more about display than GPU reset. Move it to struct intel_display. The restore sub-struct already contains reset related members, so move it there. Signed-off-by: Jani Nikula <jani.nikula@intel.com> --- drivers/gpu/drm/i915/display/intel_display_core.h | 2 ++ drivers/gpu/drm/i915/display/intel_display_reset.c | 2 +- drivers/gpu/drm/i915/display/intel_dpt.c | 5 +++-- drivers/gpu/drm/i915/display/intel_fb_pin.c | 10 ++++++---- drivers/gpu/drm/i915/display/intel_overlay.c | 5 ++--- drivers/gpu/drm/i915/i915_gpu_error.h | 2 -- 6 files changed, 14 insertions(+), 12 deletions(-)