diff mbox series

[CI,v3,2/6] drm/i915: record GEN2_IER in gtier[0] for pre-ilk error capture

Message ID f637219fe3accb69963266773b9ef7c1131875e4.1744630147.git.jani.nikula@intel.com (mailing list archive)
State New
Headers show
Series drm/i915: error capture cleanups and refactor | expand

Commit Message

Jani Nikula April 14, 2025, 11:29 a.m. UTC 
In pre-ilk platforms the engine interrupts live in GEN2_IER. Capture it
as part of gtier instead of display.

Suggested-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
 drivers/gpu/drm/i915/i915_gpu_error.c | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)
diff mbox series

Patch

diff --git a/drivers/gpu/drm/i915/i915_gpu_error.c b/drivers/gpu/drm/i915/i915_gpu_error.c
index cf31e8fecd8d..64c760e7b7ee 100644
--- a/drivers/gpu/drm/i915/i915_gpu_error.c
+++ b/drivers/gpu/drm/i915/i915_gpu_error.c
@@ -1782,8 +1782,6 @@  static void gt_record_display_regs(struct intel_gt_coredump *gt)
 		gt->ier = intel_uncore_read(uncore, VLV_IER);
 	else if (HAS_PCH_SPLIT(i915))
 		gt->ier = intel_uncore_read(uncore, DEIER);
-	else
-		gt->ier = intel_uncore_read(uncore, GEN2_IER);
 }
 
 /* Capture all other registers that GuC doesn't capture. */
@@ -1822,6 +1820,9 @@  static void gt_record_global_nonguc_regs(struct intel_gt_coredump *gt)
 	} else if (HAS_PCH_SPLIT(i915)) {
 		gt->gtier[0] = intel_uncore_read(uncore, GTIER);
 		gt->ngtier = 1;
+	} else {
+		gt->gtier[0] = intel_uncore_read(uncore, GEN2_IER);
+		gt->ngtier = 1;
 	}
 
 	gt->eir = intel_uncore_read(uncore, EIR);