diff mbox series

[3/4] drm/i915/cdclk: hide struct intel_cdclk_vals

Message ID f7e7e7fb91eae2b49a0ab5d982a235cec34e3320.1639068649.git.jani.nikula@intel.com (mailing list archive)
State New, archived
Headers show
Series drm/i915/cdclk: improve abstractions | expand

Commit Message

Jani Nikula Dec. 9, 2021, 4:51 p.m. UTC
The definition is not needed outside of intel_cdclk.c.

Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
 drivers/gpu/drm/i915/display/intel_cdclk.c | 8 ++++++++
 drivers/gpu/drm/i915/display/intel_cdclk.h | 8 --------
 2 files changed, 8 insertions(+), 8 deletions(-)

Comments

Ville Syrjälä Dec. 9, 2021, 5:46 p.m. UTC | #1
On Thu, Dec 09, 2021 at 06:51:24PM +0200, Jani Nikula wrote:
> The definition is not needed outside of intel_cdclk.c.
> 
> Signed-off-by: Jani Nikula <jani.nikula@intel.com>

Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>

> ---
>  drivers/gpu/drm/i915/display/intel_cdclk.c | 8 ++++++++
>  drivers/gpu/drm/i915/display/intel_cdclk.h | 8 --------
>  2 files changed, 8 insertions(+), 8 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_cdclk.c b/drivers/gpu/drm/i915/display/intel_cdclk.c
> index 84674a4f7226..56f40d9430b8 100644
> --- a/drivers/gpu/drm/i915/display/intel_cdclk.c
> +++ b/drivers/gpu/drm/i915/display/intel_cdclk.c
> @@ -1219,6 +1219,14 @@ static bool has_cdclk_squasher(struct drm_i915_private *i915)
>  	return IS_DG2(i915);
>  }
>  
> +struct intel_cdclk_vals {
> +	u32 cdclk;
> +	u16 refclk;
> +	u16 waveform;
> +	u8 divider;	/* CD2X divider * 2 */
> +	u8 ratio;
> +};
> +
>  static const struct intel_cdclk_vals bxt_cdclk_table[] = {
>  	{ .refclk = 19200, .cdclk = 144000, .divider = 8, .ratio = 60 },
>  	{ .refclk = 19200, .cdclk = 288000, .divider = 4, .ratio = 60 },
> diff --git a/drivers/gpu/drm/i915/display/intel_cdclk.h b/drivers/gpu/drm/i915/display/intel_cdclk.h
> index 77e8c8e1708f..50b93226517e 100644
> --- a/drivers/gpu/drm/i915/display/intel_cdclk.h
> +++ b/drivers/gpu/drm/i915/display/intel_cdclk.h
> @@ -16,14 +16,6 @@ struct drm_i915_private;
>  struct intel_atomic_state;
>  struct intel_crtc_state;
>  
> -struct intel_cdclk_vals {
> -	u32 cdclk;
> -	u16 refclk;
> -	u16 waveform;
> -	u8 divider;	/* CD2X divider * 2 */
> -	u8 ratio;
> -};
> -
>  struct intel_cdclk_state {
>  	struct intel_global_state base;
>  
> -- 
> 2.30.2
diff mbox series

Patch

diff --git a/drivers/gpu/drm/i915/display/intel_cdclk.c b/drivers/gpu/drm/i915/display/intel_cdclk.c
index 84674a4f7226..56f40d9430b8 100644
--- a/drivers/gpu/drm/i915/display/intel_cdclk.c
+++ b/drivers/gpu/drm/i915/display/intel_cdclk.c
@@ -1219,6 +1219,14 @@  static bool has_cdclk_squasher(struct drm_i915_private *i915)
 	return IS_DG2(i915);
 }
 
+struct intel_cdclk_vals {
+	u32 cdclk;
+	u16 refclk;
+	u16 waveform;
+	u8 divider;	/* CD2X divider * 2 */
+	u8 ratio;
+};
+
 static const struct intel_cdclk_vals bxt_cdclk_table[] = {
 	{ .refclk = 19200, .cdclk = 144000, .divider = 8, .ratio = 60 },
 	{ .refclk = 19200, .cdclk = 288000, .divider = 4, .ratio = 60 },
diff --git a/drivers/gpu/drm/i915/display/intel_cdclk.h b/drivers/gpu/drm/i915/display/intel_cdclk.h
index 77e8c8e1708f..50b93226517e 100644
--- a/drivers/gpu/drm/i915/display/intel_cdclk.h
+++ b/drivers/gpu/drm/i915/display/intel_cdclk.h
@@ -16,14 +16,6 @@  struct drm_i915_private;
 struct intel_atomic_state;
 struct intel_crtc_state;
 
-struct intel_cdclk_vals {
-	u32 cdclk;
-	u16 refclk;
-	u16 waveform;
-	u8 divider;	/* CD2X divider * 2 */
-	u8 ratio;
-};
-
 struct intel_cdclk_state {
 	struct intel_global_state base;