[v3,0/5] KVM: VMX: Tscdeadline timer emulation fastpath

Message

Wanpeng Li April 24, 2020, 6:22 a.m. UTC

IPI and Timer cause the main vmexits in cloud environment observation, 
after single target IPI fastpath, let's optimize tscdeadline timer 
latency by introducing tscdeadline timer emulation fastpath, it will 
skip various KVM related checks when possible. i.e. after vmexit due 
to tscdeadline timer emulation, handle it and vmentry immediately 
without checking various kvm stuff when possible. 

Testing on SKX Server.

cyclictest in guest(w/o mwait exposed, adaptive advance lapic timer is default -1):

5540.5ns -> 4602ns       17%

kvm-unit-test/vmexit.flat:

w/o avanced timer:
tscdeadline_immed: 2885    -> 2431.25  15.7%
tscdeadline:       5668.75 -> 5188.5    8.4%

w/ adaptive advance timer default -1:
tscdeadline_immed: 2965.25 -> 2520     15.0%
tscdeadline:       4663.75 -> 4537      2.7%

Tested-by: Haiwei Li <[e-mail]>
Cc: Haiwei Li <[e-mail]>

v2 -> v3:
 * skip interrupt notify and use vmx_sync_pir_to_irr before each cont_run
 * add from_timer_fn argument to apic_timer_expired
 * remove all kinds of duplicate codes

v1 -> v2:
 * move more stuff from vmx.c to lapic.c
 * remove redundant checking
 * check more conditions to bail out CONT_RUN
 * not break AMD
 * not handle LVTT sepecial
 * cleanup codes

Wanpeng Li (5):
  KVM: VMX: Introduce generic fastpath handler
  KVM: X86: Introduce need_cancel_enter_guest helper
  KVM: VMX: Optimize posted-interrupt delivery for timer fastpath
  KVM: X86: TSCDEADLINE MSR emulation fastpath
  KVM: VMX: Handle preemption timer fastpath

 arch/x86/include/asm/kvm_host.h |  1 +
 arch/x86/kvm/lapic.c            | 18 +++++++++-----
 arch/x86/kvm/vmx/vmx.c          | 52 ++++++++++++++++++++++++++++++++++-------
 arch/x86/kvm/x86.c              | 40 ++++++++++++++++++++++++-------
 arch/x86/kvm/x86.h              |  1 +
 virt/kvm/kvm_main.c             |  1 +
 6 files changed, 91 insertions(+), 22 deletions(-)