From patchwork Fri Apr 24 10:45:42 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Pierre Morel X-Patchwork-Id: 11507511 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 3740A13B2 for ; Fri, 24 Apr 2020 10:46:02 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 232A12064A for ; Fri, 24 Apr 2020 10:46:02 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726858AbgDXKqB (ORCPT ); Fri, 24 Apr 2020 06:46:01 -0400 Received: from mx0b-001b2d01.pphosted.com ([148.163.158.5]:10294 "EHLO mx0a-001b2d01.pphosted.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1726582AbgDXKqA (ORCPT ); Fri, 24 Apr 2020 06:46:00 -0400 Received: from pps.filterd (m0098414.ppops.net [127.0.0.1]) by mx0b-001b2d01.pphosted.com (8.16.0.42/8.16.0.42) with SMTP id 03OAY86Z026077; Fri, 24 Apr 2020 06:45:59 -0400 Received: from pps.reinject (localhost [127.0.0.1]) by mx0b-001b2d01.pphosted.com with ESMTP id 30kk5tb6ps-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Fri, 24 Apr 2020 06:45:58 -0400 Received: from m0098414.ppops.net (m0098414.ppops.net [127.0.0.1]) by pps.reinject (8.16.0.36/8.16.0.36) with SMTP id 03OAhhb9060735; Fri, 24 Apr 2020 06:45:58 -0400 Received: from ppma01fra.de.ibm.com (46.49.7a9f.ip4.static.sl-reverse.com [159.122.73.70]) by mx0b-001b2d01.pphosted.com with ESMTP id 30kk5tb6p1-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Fri, 24 Apr 2020 06:45:58 -0400 Received: from pps.filterd (ppma01fra.de.ibm.com [127.0.0.1]) by ppma01fra.de.ibm.com (8.16.0.27/8.16.0.27) with SMTP id 03OAjWGv007923; Fri, 24 Apr 2020 10:45:56 GMT Received: from b06cxnps4075.portsmouth.uk.ibm.com (d06relay12.portsmouth.uk.ibm.com [9.149.109.197]) by ppma01fra.de.ibm.com with ESMTP id 30fs658x5e-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Fri, 24 Apr 2020 10:45:56 +0000 Received: from d06av23.portsmouth.uk.ibm.com (d06av23.portsmouth.uk.ibm.com [9.149.105.59]) by b06cxnps4075.portsmouth.uk.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id 03OAjsSM60883006 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Fri, 24 Apr 2020 10:45:54 GMT Received: from d06av23.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 33475A404D; Fri, 24 Apr 2020 10:45:54 +0000 (GMT) Received: from d06av23.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id CA00DA4053; Fri, 24 Apr 2020 10:45:53 +0000 (GMT) Received: from oc3016276355.ibm.com (unknown [9.145.79.138]) by d06av23.portsmouth.uk.ibm.com (Postfix) with ESMTP; Fri, 24 Apr 2020 10:45:53 +0000 (GMT) From: Pierre Morel To: kvm@vger.kernel.org Cc: linux-s390@vger.kernel.org, frankja@linux.ibm.com, david@redhat.com, thuth@redhat.com, cohuck@redhat.com Subject: [kvm-unit-tests PATCH v6 00/10] s390x: Testing the Channel Subsystem I/O Date: Fri, 24 Apr 2020 12:45:42 +0200 Message-Id: <1587725152-25569-1-git-send-email-pmorel@linux.ibm.com> X-Mailer: git-send-email 1.8.3.1 X-TM-AS-GCONF: 00 X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.138,18.0.676 definitions=2020-04-24_04:2020-04-23,2020-04-24 signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 spamscore=0 lowpriorityscore=0 adultscore=0 mlxscore=0 bulkscore=0 clxscore=1015 priorityscore=1501 suspectscore=1 impostorscore=0 malwarescore=0 mlxlogscore=999 phishscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2003020000 definitions=main-2004240082 Sender: kvm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org Goal of the series is to have a framwork to test Channel-Subsystem I/O with QEMU/KVM. To be able to support interrupt for CSS I/O and for SCLP we need to modify the interrupt framework to allow re-entrant interruptions. We add a registration for IRQ callbacks to the test programm to define its own interrupt handler. We need to do special work under interrupt like acknoledging the interrupt. Being working on PSW bits to allow I/O interrupt, we define new PSW bits in arch_def.h and use __ASSEMBLER__ define to be able to include this header in an assembler source file. This series presents four major tests: - Enumeration: The CSS is enumerated using the STSCH instruction recursively on all potentially existing channels. Keeping the first channel found as a reference for future use. Checks STSCH - Enable: If the enumeration succeeded the tests enables the reference channel with MSCH and verifies with STSCH that the channel is effectively enabled Checks MSCH - Sense: If the channel is enabled this test sends a SENSE_ID command to the reference channel, analysing the answer and expecting the Control unit type being 0xc0ca Checks SSCH(READ) and IO-IRQ - ping-pong: If the reference channel leads to the PONG device (0xc0ca), the test exchanges a string containing a 9 digit number with the PONG device and expecting this number to be incremented by the PONG device. Checks SSCH(WRITE) Note: - The following patches may be pulled first: s390x: saving regs for interrupts s390x: Use PSW bits definitions in cstart s390x: Move control register bit definitions and add AFP to them - I think this one if it receives reviewed-by can also be pulled now: s390x: define wfi: wait for interrupt - this patch has a comment from Janosch who asks change so... need opinion: but since I need reviews for the next patches I let it here unchanged. s390x: interrupt registration - These 5 patches are really I/O oriented and need reviewed-by: s390x: Library resources for CSS tests s390x: css: stsch, enumeration test s390x: css: msch, enable test s390x: css: ssch/tsch with sense and interrupt s390x: css: ping pong Pierre Morel (10): s390x: saving regs for interrupts s390x: Use PSW bits definitions in cstart s390x: Move control register bit definitions and add AFP to them s390x: interrupt registration s390x: Library resources for CSS tests s390x: css: stsch, enumeration test s390x: css: msch, enable test s390x: define wfi: wait for interrupt s390x: css: ssch/tsch with sense and interrupt s390x: css: ping pong lib/s390x/asm/arch_def.h | 31 +++- lib/s390x/css.h | 277 +++++++++++++++++++++++++++++++ lib/s390x/css_dump.c | 157 ++++++++++++++++++ lib/s390x/css_lib.c | 55 +++++++ lib/s390x/interrupt.c | 23 ++- lib/s390x/interrupt.h | 8 + s390x/Makefile | 3 + s390x/css.c | 343 +++++++++++++++++++++++++++++++++++++++ s390x/cstart64.S | 51 ++++-- s390x/unittests.cfg | 4 + 10 files changed, 936 insertions(+), 16 deletions(-) create mode 100644 lib/s390x/css.h create mode 100644 lib/s390x/css_dump.c create mode 100644 lib/s390x/css_lib.c create mode 100644 lib/s390x/interrupt.h create mode 100644 s390x/css.c