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[83.53.161.74]) by smtp.gmail.com with ESMTPSA id t17sm8129443wrx.82.2020.09.29.15.43.56 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 29 Sep 2020 15:43:56 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Thomas Huth , Paolo Bonzini , Richard Henderson , Fam Zheng , Peter Maydell , kvm@vger.kernel.org, =?utf-8?q?Al?= =?utf-8?q?ex_Benn=C3=A9e?= , qemu-arm@nongnu.org, Richard Henderson , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Subject: [PATCH v4 00/12] Support disabling TCG on ARM (part 2) Date: Wed, 30 Sep 2020 00:43:43 +0200 Message-Id: <20200929224355.1224017-1-philmd@redhat.com> X-Mailer: git-send-email 2.26.2 MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org Cover from Samuel Ortiz from (part 1) [1]: This patchset allows for building and running ARM targets with TCG disabled. [...] The rationale behind this work comes from the NEMU project where we're trying to only support x86 and ARM 64-bit architectures, without including the TCG code base. We can only do so if we can build and run ARM binaries with TCG disabled. v4 almost 2 years later... [2]: - Rebased on Meson - Addressed Richard review comments - Addressed Claudio review comments v3 almost 18 months later [3]: - Rebased - Addressed Thomas review comments - Added Travis-CI job to keep building --disable-tcg on ARM v2 [4]: - Addressed review comments from Richard and Thomas from v1 [1] Regards, Phil. [1]: https://lists.gnu.org/archive/html/qemu-devel/2018-11/msg02451.html [2]: https://www.mail-archive.com/qemu-devel@nongnu.org/msg689168.html [3]: https://www.mail-archive.com/qemu-devel@nongnu.org/msg641796.html [4]: https://lists.gnu.org/archive/html/qemu-devel/2019-08/msg05003.html Green CI: - https://cirrus-ci.com/build/4572961761918976 - https://gitlab.com/philmd/qemu/-/pipelines/196047779 - https://travis-ci.org/github/philmd/qemu/builds/731370972 Based-on: <20200929125609.1088330-1-philmd@redhat.com> "hw/arm: Restrict APEI tables generation to the 'virt' machine" https://www.mail-archive.com/qemu-devel@nongnu.org/msg745792.html Philippe Mathieu-Daudé (10): accel/tcg: Add stub for cpu_loop_exit() meson: Allow optional target/${ARCH}/Kconfig target/arm: Select SEMIHOSTING if TCG is available target/arm: Restrict ARMv4 cpus to TCG accel target/arm: Restrict ARMv5 cpus to TCG accel target/arm: Restrict ARMv6 cpus to TCG accel target/arm: Restrict ARMv7 R-profile cpus to TCG accel target/arm: Restrict ARMv7 M-profile cpus to TCG accel target/arm: Reorder meson.build rules .travis.yml: Add a KVM-only Aarch64 job Samuel Ortiz (1): target/arm: Do not build TCG objects when TCG is off Thomas Huth (1): target/arm: Make m_helper.c optional via CONFIG_ARM_V7M default-configs/arm-softmmu.mak | 3 -- meson.build | 8 +++- target/arm/cpu.h | 12 ------ accel/stubs/tcg-stub.c | 5 +++ target/arm/cpu_tcg.c | 4 +- target/arm/helper.c | 7 ---- target/arm/m_helper-stub.c | 73 +++++++++++++++++++++++++++++++++ .travis.yml | 35 ++++++++++++++++ hw/arm/Kconfig | 32 +++++++++++++++ target/arm/Kconfig | 4 ++ target/arm/meson.build | 40 +++++++++++------- 11 files changed, 184 insertions(+), 39 deletions(-) create mode 100644 target/arm/m_helper-stub.c create mode 100644 target/arm/Kconfig