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Peter Anvin" , Tony Luck , Dave Hansen , "Peter Zijlstra (Intel)" , Paolo Bonzini , Tom Lendacky , David Rientjes , Sean Christopherson Subject: [RFC Part1 PATCH 00/13] Add AMD Secure Nested Paging (SEV-SNP) Guest Support Date: Wed, 24 Mar 2021 11:44:11 -0500 Message-Id: <20210324164424.28124-1-brijesh.singh@amd.com> X-Mailer: git-send-email 2.17.1 X-Originating-IP: [165.204.77.1] X-ClientProxiedBy: SA0PR11CA0010.namprd11.prod.outlook.com (2603:10b6:806:d3::15) To SN6PR12MB2718.namprd12.prod.outlook.com (2603:10b6:805:6f::22) MIME-Version: 1.0 X-MS-Exchange-MessageSentRepresentingType: 1 Received: from sbrijesh-desktop.amd.com (165.204.77.1) by SA0PR11CA0010.namprd11.prod.outlook.com (2603:10b6:806:d3::15) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.3977.24 via Frontend Transport; Wed, 24 Mar 2021 16:44:36 +0000 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-HT: Tenant X-MS-Office365-Filtering-Correlation-Id: cf56288d-8684-4ee8-1275-08d8eee41c63 X-MS-TrafficTypeDiagnostic: SN1PR12MB2447: X-MS-Exchange-Transport-Forked: True X-Microsoft-Antispam-PRVS: X-MS-Oob-TLC-OOBClassifiers: OLM:4125; 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X-MS-Exchange-AntiSpam-MessageData: =?utf-8?q?2bcafRUyJzzM+RcOFjrUp9ociEARec?= =?utf-8?q?1VKVup5V47YKugIwViHbomRnzVZ83UjvlR4ktUXUxkgrWBlqOkrlA+hDhqW6ds32I?= =?utf-8?q?2kXp+HS0xUHlC/C3bgmF8/b4TMP0u817PHYiHK9dzINikfdfCeGWujqzzpIX5gRk/?= =?utf-8?q?jq66/yHDebdkp2u1AK6f6GNNRgRs7iMF/q+28fsE2mXlg0L2S1xCgO2jd5OPx+2y/?= =?utf-8?q?a6WX7qHfmE7tB+UNo/1C1UqoBJsbEKLavndaitV2Fm5Z7uIphTi81f3D26RwQy4ee?= =?utf-8?q?bhu0SWoS8WQvMKcxl/oRJzzBu4nH5inKkFhdkif/42C4hotVkB1RnDFLRFdz4CTP+?= =?utf-8?q?iSF0dh2kXdLHyMwI/Qeq8a3yf5PZQpQUOTXoczYoLInpHQmT+IMXevuF7LjQl0mph?= =?utf-8?q?JMcSe3NYVk577ErQSsPjBZzMwXkgjVvON6NFosFvpoAYGJcYvcI1bvt+dNpembgLe?= =?utf-8?q?6o3ZivhCI/JkrXNat+73eqEwYAkL/94tcyd+icSMjieFzhjpYj9nGMVJt9JhuLTiV?= =?utf-8?q?uRhRyzFwC9EkH8swJke0hJuaTfX2VWWOw36h7N9DPw8UbEHYh1t3CmyGnpPEOg4wG?= =?utf-8?q?Q1aI6RpO8a5MBssjSALhtp8Gk3jVr3pVjmmsXfKrsx+3pILtfikV7WKgt1u0LMuyW?= =?utf-8?q?sEnDJWTMVoP3stdJTjw9erFQ5y+MGQ/VYiosXjecpEQDPh4FvzYIHbFVoWt2ug308?= =?utf-8?q?u1PAPMNFFdiu7eWsMzkmPt85RZkv/R24Cr1QhJterc1GYtvVITp+GHwRN3BlKpCQ8?= =?utf-8?q?GLDBKbbiiFFwH3ohLk/euks51u5Ijwd4VHnAFTkTURPfc7oV+NMhrnEBkUxXPFqlo?= =?utf-8?q?24NfrLY2JyanaBtN8pXhMwzhRnjyIMzaodQ8adzV+AP9hyk5zVxs1qBMarBZn3OOA?= =?utf-8?q?fZ+pNijUoikSbDw3Kz6ii9aOdmzwHhcLrJRtEl0V3CjcgTQA/pxRFVZOZs6Tdd7uB?= =?utf-8?q?6LxZf1KFV47gEazQGlicmEETAuMVyXT3rtmJC/NkW/Mcr6nR8gDRnXanomjZ9DpV3?= =?utf-8?q?R3pmYzvwIhwkzEQlmp3SXnDQQutL3BkhPxJ4p1TTi453qeR4lGIjySX1KQ46mw/aP?= =?utf-8?q?23hnFAaVrPf0Wl5m79j58PMakNmOrt6oGt5qQiLz77hcazAl0rCxx37pGGSav5rqY?= =?utf-8?q?EHflHG8yGWQZJxxsBzrYJarzOOyb7Amac+QjiU5lipV4OLDLlDE3lZgt5rgoKv48A?= =?utf-8?q?ynNEAvSo4ksuFqjZI6NZoDhnuQ93xFXDwYZrb3T6AEbWv2hEvxS/QtqBhEbgUTwRP?= =?utf-8?q?Ws9ILzhqpdPqF9?= X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-Network-Message-Id: cf56288d-8684-4ee8-1275-08d8eee41c63 X-MS-Exchange-CrossTenant-AuthSource: SN6PR12MB2718.namprd12.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 24 Mar 2021 16:44:37.7389 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: 09bEbZtHhtkVMtQIG9hzFD96S7wSJgwTjL/WJ1+eF+hkkcW8h8jyecKby/S3D1MXnPP+geZu0jdLVvqZMvHo1g== X-MS-Exchange-Transport-CrossTenantHeadersStamped: SN1PR12MB2447 Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org This part of Secure Encrypted Paging (SEV-SNP) series focuses on the changes required in a guest OS for SEV-SNP support. SEV-SNP builds upon existing SEV and SEV-ES functionality while adding new hardware-based memory protections. SEV-SNP adds strong memory integrity protection to help prevent malicious hypervisor-based attacks like data replay, memory re-mapping and more in order to create an isolated memory encryption environment. This series provides the basic building blocks to support booting the SEV-SNP VMs, it does not cover all the security enhancement introduced by the SEV-SNP such as interrupt protection. Many of the integrity guarantees of SEV-SNP are enforced through a new structure called the Reverse Map Table (RMP). Adding a new page to SEV-SNP VM requires a 2-step process. First, the hypervisor assigns a page to the guest using the new RMPUPDATE instruction. This transitions the page to guest-invalid. Second, the guest validates the page using the new PVALIDATE instruction. The SEV-SNP VMs can use the new "Page State Change Request NAE" defined in the GHCB specification to ask hypervisor to add or remove page from the RMP table. Each page assigned to the SEV-SNP VM can either be validated or unvalidated, as indicated by the Validated flag in the page's RMP entry. There are two approaches that can be taken for the page validation: Pre-validation and Lazy Validation. Under pre-validation, the pages are validated prior to first use. And under lazy validation, pages are validated when first accessed. An access to a unvalidated page results in a #VC exception, at which time the exception handler may validate the page. Lazy validation requires careful tracking of the validated pages to avoid validating the same GPA more than once. The recently introduced "Unaccepted" memory type can be used to communicate the unvalidated memory ranges to the Guest OS. At this time we only sypport the pre-validation, the OVMF guest BIOS validates the entire RAM before the control is handed over to the guest kernel. The early_set_memory_{encrypt,decrypt} and set_memory_{encrypt,decrypt} are enlightened to perform the page validation or invalidation while setting or clearing the encryption attribute from the page table. This series does not provide support for the following SEV-SNP features yet: * CPUID filtering * Driver to query attestation report * AP bring up using the new SEV-SNP NAE * Lazy validation * Interrupt security The series is based on kvm/master commit: 87aa9ec939ec KVM: x86/mmu: Fix TDP MMU zap collapsible SPTEs The complete source is available at https://github.com/AMDESE/linux/tree/sev-snp-part-1-rfc1 Cc: Thomas Gleixner Cc: Ingo Molnar Cc: Borislav Petkov Cc: Joerg Roedel Cc: "H. Peter Anvin" Cc: Tony Luck Cc: Dave Hansen Cc: "Peter Zijlstra (Intel)" Cc: Paolo Bonzini Cc: Tom Lendacky Cc: David Rientjes Cc: Sean Christopherson Cc: x86@kernel.org Cc: kvm@vger.kernel.org Additional resources --------------------- SEV-SNP whitepaper https://www.amd.com/system/files/TechDocs/SEV-SNP-strengthening-vm-isolation-with-integrity-protection-and-more.pdf APM 2: https://www.amd.com/system/files/TechDocs/24593.pdf (section 15.36) GHCB spec v2: The draft specification is posted on AMD-SEV-SNP mailing list: https://lists.suse.com/mailman/private/amd-sev-snp/ Copy of draft spec is also available at https://github.com/AMDESE/AMDSEV/blob/sev-snp-devel/docs/56421-Guest_Hypervisor_Communication_Block_Standardization.pdf GHCB spec v1: SEV-SNP firmware specification: https://developer.amd.com/sev/ Brijesh Singh (13): x86/cpufeatures: Add SEV-SNP CPU feature x86/mm: add sev_snp_active() helper x86: add a helper routine for the PVALIDATE instruction x86/sev-snp: define page state change VMGEXIT structure X86/sev-es: move few helper functions in common file x86/compressed: rescinds and validate the memory used for the GHCB x86/compressed: register GHCB memory when SNP is active x86/sev-es: register GHCB memory when SEV-SNP is active x86/kernel: add support to validate memory in early enc attribute change X86: kernel: make the bss.decrypted section shared in RMP table x86/kernel: validate rom memory before accessing when SEV-SNP is active x86/sev-es: make GHCB get and put helper accessible outside x86/kernel: add support to validate memory when changing C-bit arch/x86/boot/compressed/Makefile | 1 + arch/x86/boot/compressed/ident_map_64.c | 18 ++ arch/x86/boot/compressed/sev-common.c | 32 +++ arch/x86/boot/compressed/sev-es.c | 26 +-- arch/x86/boot/compressed/sev-snp.c | 141 +++++++++++++ arch/x86/boot/compressed/sev-snp.h | 25 +++ arch/x86/include/asm/cpufeatures.h | 1 + arch/x86/include/asm/mem_encrypt.h | 2 + arch/x86/include/asm/msr-index.h | 2 + arch/x86/include/asm/sev-es.h | 11 + arch/x86/include/asm/sev-snp.h | 121 +++++++++++ arch/x86/include/uapi/asm/svm.h | 1 + arch/x86/kernel/Makefile | 3 + arch/x86/kernel/cpu/amd.c | 3 +- arch/x86/kernel/cpu/scattered.c | 1 + arch/x86/kernel/head64.c | 14 ++ arch/x86/kernel/probe_roms.c | 15 ++ arch/x86/kernel/sev-common-shared.c | 31 +++ arch/x86/kernel/sev-es-shared.c | 21 +- arch/x86/kernel/sev-es.c | 32 ++- arch/x86/kernel/sev-snp.c | 269 ++++++++++++++++++++++++ arch/x86/mm/mem_encrypt.c | 49 ++++- arch/x86/mm/pat/set_memory.c | 19 ++ 23 files changed, 792 insertions(+), 46 deletions(-) create mode 100644 arch/x86/boot/compressed/sev-common.c create mode 100644 arch/x86/boot/compressed/sev-snp.c create mode 100644 arch/x86/boot/compressed/sev-snp.h create mode 100644 arch/x86/include/asm/sev-snp.h create mode 100644 arch/x86/kernel/sev-common-shared.c create mode 100644 arch/x86/kernel/sev-snp.c