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[v2,0/7] KVM: VMX: PT (processor trace) optimization cleanup and fixes

Message ID 20210827070249.924633-1-xiaoyao.li@intel.com (mailing list archive)
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Series KVM: VMX: PT (processor trace) optimization cleanup and fixes | expand

Message

Xiaoyao Li Aug. 27, 2021, 7:02 a.m. UTC
Patch 1-3 are optimization and cleanup. 

Patch 4-7 are fixes for PT. Patch 4 and 5 fix the virtulazation of PT to
provide architectual consistent behavior for guest. Patch 6 fix the case
that malicious userspace can exploit PT to cause vm-entry failure or #GP
in KVM. Patch 7 fix the potential MSR access #GP if some PT MSRs not
available on hardware.

Patch 3 and patch 7 are added in v2.

Xiaoyao Li (7):
  KVM: VMX: Restore host's MSR_IA32_RTIT_CTL when it's not zero
  KVM: VMX: Use precomputed vmx->pt_desc.addr_range
  KVM: VMX: Rename pt_desc.addr_range to pt_desc.nr_addr_range
  KVM: VMX: RTIT_CTL_BRANCH_EN has no dependency on other CPUID bit
  KVM: VMX: Disallow PT MSRs accessing if PT is not exposed to guest
  KVM: VMX: Check Intel PT related CPUID leaves
  KVM: VMX: Only context switch some PT MSRs when they exist

 arch/x86/kvm/cpuid.c   |  25 ++++++++++
 arch/x86/kvm/vmx/vmx.c | 110 ++++++++++++++++++++++++++---------------
 arch/x86/kvm/vmx/vmx.h |   2 +-
 3 files changed, 95 insertions(+), 42 deletions(-)

Comments

Paolo Bonzini Oct. 19, 2021, 4:52 p.m. UTC | #1
On 27/08/21 09:02, Xiaoyao Li wrote:
> Patch 1-3 are optimization and cleanup.
> 
> Patch 4-7 are fixes for PT. Patch 4 and 5 fix the virtulazation of PT to
> provide architectual consistent behavior for guest. Patch 6 fix the case
> that malicious userspace can exploit PT to cause vm-entry failure or #GP
> in KVM. Patch 7 fix the potential MSR access #GP if some PT MSRs not
> available on hardware.
> 
> Patch 3 and patch 7 are added in v2.

Queued patches 1-4, thanks.

Paolo