| Message ID | 20220122161201.73528-1-weijiang.yang@intel.com (mailing list archive) |
|---|---|
| Headers | show |
| Series | Enable legacy LBR support for guest | expand |
Hi Weijiang, On 23/1/2022 12:11 am, Yang Weijiang wrote: > KVM legacy LBR patches have been merged in kernel 5.12, this patchset > is to expose the feature to guest from the perf capability MSR. Qemu can > add LBR format in cpu option to achieve it, e.g., -cpu host,lbr-fmt=0x5, Some older Intel CPUs may have lbr-fmt=LBR_FORMAT_32 (which is 0), would you help verify that KVM is supported on these platforms ? If so, how do we enable guest LBR form the QEMU side, w/ -cpu host,lbr-fmt=0x0 ? > the format should match host value in IA32_PERF_CAPABILITIES. > > Note, KVM legacy LBR solution accelerates guest perf performace by LBR MSR > passthrough so it requires guest cpu model matches that of host's, i.e., Would you help add live migration support across host/guest CPU models when hosts at both ends have the same number of LBR entries and the same lbr-fmt ? Thanks, Like Xu > only -cpu host is supported. > > Change in v5: > 1. This patchset is rebased on tip : 6621441db5 > 2. No functional change since v4.
On 2/9/2022 5:14 PM, Like Xu wrote: > Hi Weijiang, > > On 23/1/2022 12:11 am, Yang Weijiang wrote: >> KVM legacy LBR patches have been merged in kernel 5.12, this patchset >> is to expose the feature to guest from the perf capability MSR. Qemu can >> add LBR format in cpu option to achieve it, e.g., -cpu host,lbr-fmt=0x5, > > Some older Intel CPUs may have lbr-fmt=LBR_FORMAT_32 (which is 0), would > you help verify that KVM is supported on these platforms ? If so, how > do we enable > guest LBR form the QEMU side, w/ -cpu host,lbr-fmt=0x0 ? Hi, Like, do you know which cpu model or platform so that I can have a test on? > >> the format should match host value in IA32_PERF_CAPABILITIES. >> >> Note, KVM legacy LBR solution accelerates guest perf performace by >> LBR MSR >> passthrough so it requires guest cpu model matches that of host's, i.e., > > Would you help add live migration support across host/guest CPU models > when > hosts at both ends have the same number of LBR entries and the same > lbr-fmt ? Yes, I'm working on this part for Arch LBR, then enable it for legacy LBR as well. > > Thanks, > Like Xu > >> only -cpu host is supported. >> >> Change in v5: >> 1. This patchset is rebased on tip : 6621441db5 >> 2. No functional change since v4.
KVM legacy LBR patches have been merged in kernel 5.12, this patchset is to expose the feature to guest from the perf capability MSR. Qemu can add LBR format in cpu option to achieve it, e.g., -cpu host,lbr-fmt=0x5, the format should match host value in IA32_PERF_CAPABILITIES. Note, KVM legacy LBR solution accelerates guest perf performace by LBR MSR passthrough so it requires guest cpu model matches that of host's, i.e., only -cpu host is supported. Change in v5: 1. This patchset is rebased on tip : 6621441db5 2. No functional change since v4. Yang Weijiang (2): qdev-properties: Add a new macro with bitmask check for uint64_t property target/i386: Add lbr-fmt vPMU option to support guest LBR hw/core/qdev-properties.c | 19 +++++++++++++++++ include/hw/qdev-properties.h | 12 +++++++++++ target/i386/cpu.c | 40 ++++++++++++++++++++++++++++++++++++ target/i386/cpu.h | 10 +++++++++ 4 files changed, 81 insertions(+)