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X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 21 Feb 2022 07:32:28.3383 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 4f487d10-c364-452b-7e4a-08d9f50c503e X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: DM6NAM11FT023.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: BYAPR12MB2933 Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org Use INTEL_ prefix for some Intel specific macros. Plus segregate Intel and AMD specific logic in kvm code. Patches prepared on top of kvm/master (710c476514313) Ravi Bangoria (3): x86/pmu: Add INTEL_ prefix in some Intel specific macros x86/pmu: Replace X86_ALL_EVENT_FLAGS with INTEL_ALL_EVENT_FLAGS KVM: x86/pmu: Segregate Intel and AMD specific logic arch/x86/events/intel/core.c | 14 +++---- arch/x86/events/intel/ds.c | 2 +- arch/x86/events/perf_event.h | 34 ++++++++-------- arch/x86/include/asm/perf_event.h | 14 +++---- arch/x86/kvm/pmu.c | 68 +++++++++++++++++++------------ arch/x86/kvm/pmu.h | 4 +- arch/x86/kvm/svm/pmu.c | 6 ++- arch/x86/kvm/vmx/pmu_intel.c | 6 +-- 8 files changed, 85 insertions(+), 63 deletions(-)