mbox series

[v2,0/3] KVM: x86: Hyper-V invariant TSC control feature

Message ID 20220831085009.1627523-1-vkuznets@redhat.com (mailing list archive)
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Series KVM: x86: Hyper-V invariant TSC control feature | expand

Message

Vitaly Kuznetsov Aug. 31, 2022, 8:50 a.m. UTC
Changes since v1:
- Drop "KVM: selftests: Fix wrmsr_safe()" patch as it is already merged.
- Add 'KVM: selftests: Rename 'msr->availble' to 'msr->should_not_gp' in
 hyperv_features test' patch [Max]
- Rebase selftest to the current API.

Original description:

Normally, genuine Hyper-V doesn't expose architectural invariant TSC
(CPUID.80000007H:EDX[8]) to its guests by default. A special PV MSR
(HV_X64_MSR_TSC_INVARIANT_CONTROL, 0x40000118) and corresponding CPUID
feature bit (CPUID.0x40000003.EAX[15]) were introduced. When bit 0 of the
PV MSR is set, invariant TSC bit starts to show up in CPUID. When the 
feature is exposed to Hyper-V guests, reenlightenment becomes unneeded.

Note: strictly speaking, KVM doesn't have to have the feature as exposing
raw invariant TSC bit (CPUID.80000007H:EDX[8]) also seems to work for
modern Windows versions. The feature is, however, tiny and straitforward
and gives additional flexibility so why not.

Vitaly Kuznetsov (3):
  KVM: x86: Hyper-V invariant TSC control
  KVM: selftests: Rename 'msr->availble' to 'msr->should_not_gp' in
    hyperv_features test
  KVM: selftests: Test Hyper-V invariant TSC control

 arch/x86/include/asm/kvm_host.h               |   1 +
 arch/x86/kvm/cpuid.c                          |   7 +
 arch/x86/kvm/hyperv.c                         |  19 +++
 arch/x86/kvm/hyperv.h                         |  15 ++
 arch/x86/kvm/x86.c                            |   4 +-
 .../selftests/kvm/x86_64/hyperv_features.c    | 159 +++++++++++++-----
 6 files changed, 158 insertions(+), 47 deletions(-)