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Received-SPF: Pass (protection.outlook.com: domain of amd.com designates 165.204.84.17 as permitted sender) receiver=protection.outlook.com; client-ip=165.204.84.17; helo=SATLEXMB04.amd.com; pr=C Received: from SATLEXMB04.amd.com (165.204.84.17) by SJ5PEPF000001C9.mail.protection.outlook.com (10.167.242.37) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.20.7452.22 via Frontend Transport; Mon, 1 Apr 2024 15:20:47 +0000 Received: from chalupa-4a00host.amd.com (10.180.168.240) by SATLEXMB04.amd.com (10.181.40.145) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.35; Mon, 1 Apr 2024 10:20:46 -0500 From: Manali Shukla To: , CC: , , , , , , Subject: [PATCH v2 0/3] Add a test case for KVM_X86_DISABLE_EXIT Date: Mon, 1 Apr 2024 15:20:29 +0000 Message-ID: <20240401152032.4284-1-manali.shukla@amd.com> X-Mailer: git-send-email 2.34.1 Precedence: bulk X-Mailing-List: kvm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-ClientProxiedBy: SATLEXMB03.amd.com (10.181.40.144) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SJ5PEPF000001C9:EE_|SJ2PR12MB8876:EE_ X-MS-Office365-Filtering-Correlation-Id: 782ed2a3-56bc-49c8-53f9-08dc525f4ec7 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 01 Apr 2024 15:20:47.5418 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 782ed2a3-56bc-49c8-53f9-08dc525f4ec7 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: SJ5PEPF000001C9.namprd05.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SJ2PR12MB8876 By default, HLT instruction executed by guest is intercepted by hypervisor. However, KVM_CAP_X86_DISABLE_EXITS capability can be used to not intercept HLT by setting KVM_X86_DISABLE_EXITS_HLT. By default, vms are created with in-kernel APIC support in KVM selftests. VM needs to be created without in-kernel APIC support for this test, so that HLT will exit to userspace. To do so, __vm_create() is modified to not call KVM_CREATE_IRQCHIP ioctl while creating vm. Add a test case to test KVM_X86_DISABLE_EXITS_HLT functionality. Patch 1, 2 -> Preparatory patches to add the KVM_X86_DISABLE_EXITS_HLT test case Patch 3 -> Adds a test case for KVM_X86_DISABLE_EXITS_HLT Testing done: Tested KVM_X86_DISABLE_EXITS_HLT test case on AMD and Intel machines. v1 -> v2 - Extended @shape to allow creation of VM without in-kernel APIC support (Andrew Jones) - Changed the test case based on Andrew's comments. - Few more changes to the test case to pass the address of the flag on which guest waits to execute HLT. Manali Shukla (3): KVM: selftests: Add safe_halt() and cli() helpers to common code KVM: selftests: Extend @shape to allow creation of VM without in-kernel APIC KVM: selftests: Add a test case for KVM_X86_DISABLE_EXITS_HLT tools/testing/selftests/kvm/Makefile | 1 + .../selftests/kvm/include/kvm_util_base.h | 17 ++- .../selftests/kvm/include/x86_64/processor.h | 17 +++ tools/testing/selftests/kvm/lib/kvm_util.c | 1 + .../selftests/kvm/lib/x86_64/processor.c | 4 +- .../kvm/x86_64/halt_disable_exit_test.c | 120 ++++++++++++++++++ 6 files changed, 158 insertions(+), 2 deletions(-) create mode 100644 tools/testing/selftests/kvm/x86_64/halt_disable_exit_test.c base-commit: e9da6f08edb0bd4c621165496778d77a222e1174